DLA SMD-5962-77026 REV C-2012 MICROCIRCUIT DIGITAL CMOS QUAD R S LATCH WITH THREE STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Complete revision; Added four sources FSCM 07263, 04713,27014,and 31019; Remove one source FSCM 34371 - gap 81-09-22 Nelson A. Hauck B 3-state propagation delay times (tPHZ) (tPZH) changed to 1 k ohm. Update document boilerplate. Case outline “F”

2、 inactive for new design - gap 84-09-05 Nelson A. Hauck C Correct title description. Table I, tests VIHand VIL, correct condition for output voltage. Editorial changes throughout. Update boilerplate to latest MIL-PRF-38535 requirements. jak 12-04-19 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET R

3、EV SHEET REV STATUS REV C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY A. J. Foley DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE

4、DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY C. R. Jackson APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL, CMOS, QUAD R/S LATCH WITH THREE STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 77-09-13 REVISION LEVEL C SIZE A CAGE CODE 14933 77026 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E109-12 P

5、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements fo

6、r MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 77026 01 J A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3)

7、 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4044B Quad R/S latches with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive d

8、esignator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VDD) -0.5 V dc to +18.0 V dc Input voltage range

9、 -0.5 V dc to VDD+ 0.5 V dc Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions.

10、2/ Supply voltage range (VDD) . +3.0 V dc to +15.0 V dc Minimum high level input voltage (VIH) (VDD= 5.0 V) . +3.5 V dc Maximum low level input voltage (VIL) (VDD= 5.0 V) . +1.5 V dc Case operating temperature range (TC) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent

11、 damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Voltages referenced to the VSSterminal. 3/ For TA= +100C to +125C, derate linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

12、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a par

13、t of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDA

14、RDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available o

15、nline at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this draw

16、ing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B d

17、evices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manu

18、facturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modif

19、ications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specifi

20、ed in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagr

21、am. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Ele

22、ctrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups spe

23、cified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marki

24、ng of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A.

25、 The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved

26、source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Ce

27、rtificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects th

28、is drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer.

29、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Te

30、st conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High-level output voltage VOHVIN= 0.0 V or VDDIOH -1.0A VDD= 5.0 V 1, 2, 3 4.95 V VDD= 10.0 V 1, 2, 3 9.95 VDD= 15.0 V 1, 2, 3 14.95 Low-level output voltage VOLVIN= 0.0 V or VDDIOL +1.0A VDD= 5.0 V 1, 2, 3

31、0.05 V VDD= 10.0 V 1, 2, 3 0.05 VDD= 15.0 V 1, 2, 3 0.05 High-level input voltage VIHVDD= 5.0 V VOL= 0.5 V, VOH= 4.5 V IOUT 1.0 A 1, 2, 3 3.5 V VDD= 10.0 V VOL= 1.0 V, VOH= 9.0 V IOUT 1.0 A 1, 2, 3 7.0 VDD= 15.0 V VOL= 1.5 V, VOH= 13.5 V IOUT 1.0 A 1, 2, 3 11.0 Low-level input voltage VILVDD= 5.0 V

32、VOL= 0.5 V, VOH= 4.5 V IOUT 1.0 A 1, 2, 3 1.5 V VDD= 10.0 V VOL= 1.0 V, VOH= 9.0 V IOUT 1.0 A 1, 2, 3 3.0 VDD= 15.0 V VOL= 1.5 V, VOH= 13.5 V IOUT 1.0 A 1, 2, 3 4.0 Quiescent supply current IOHVDD= 5.0 V VOH = 4.6 V VIN= 0.0 V or 5.0 V 1 -0.20 mA 2 -0.14 3 -0.25 VDD= 10.0 V VOH= 9.5 V VIN= 0.0 V or

33、10.0 V 1 -0.50 2 -0.35 3 -0.62 VDD= 15.0 V VOH= 13.5 V VIN= 0.0 V or 15.0 V 1 -1.5 2 -1.1 3 -1.8 Low-level output current IOLVDD= 5.0 V VOL= 0.4 V VIN= 0.0 V or 5.0 V 1 +0.51 mA 2 +0.36 3 +0.64 VDD= 10.0 V VOL= 0.5 V VIN= 0.0 V or 10.0 V 1 +1.3 2 +0.9 3 +1.60 VDD= 15.0 V VOL= 1.5 V VIN= 0.0 V or 15.

34、0 V 1 +3.4 2 +2.4 3 +4.2 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I.

35、 Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Input current IINVIN= 0.0 V or 15.0 V 1, 3 0.1 A 2 1.0 Input capacitance CIN VIN= 0.0 V, TC= 25C 4 7.5 pF Functional test See 4.3.1d 7 Input

36、 current IDDVDD= 5.0 V dc VIN= 0.0 V or VDD 1, 3 1.0 A 2 30.0 VDD= 10.0 V dc VIN= 0.0 V or VDD 1, 3 2.0 A 2 60.0 VDD= 15.0 V dc VIN= 0.0 V or VDD 1, 3 4.0 A 2 120.0 Propagation delay time, S or R to Q tPHL, tPLHVDD= 5.0 V dc CL= 50 pF 10% RL= 200 k 9 20 350 ns 10, 11 25 525 Propagation delay time, e

37、nable to output tPHZ, tPZH, tPLZ, tPZL VDD= 5.0 V dc CL= 50 pF 10% RL= 1 k 9 10.0 200 ns 10, 11 15.0 300 Transition time tTHL, tTLH VDD= 5.0 V dc CL= 50 pF 10% RL= 200 k 9 10.0 200 ns 10, 11 15.0 300 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted

38、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F Terminal number Terminal symbol 1 Q4 2 NC 3 S1 4 R1 5 ENABLE 6 R2 7 S2 8 VSS9 Q2 10 Q3 11 S3 12

39、R3 13 Q1 14 R4 15 S4 16 VDD FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 S R

40、EQ X X 0 OC 1 1 1 NC 0 1 1 1 1 0 1 0 0 0 1 1/ 1 = High logic level 0 = Low logic level X = irrelevant 1/ Dominated by R = 0 input FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR

41、AWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance wit

42、h method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under do

43、cument revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minim

44、um. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance

45、with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1/ 1, 2, 3, 7, 9 Group A test requirements (method 5005) 1, 2, 3, 4, 7, 9 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3, 9 1/ PDA applies to

46、 subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II here

47、in. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CINmeasurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. Capacitance shall be measured between the designated terminal and VSS a

48、t a frequency of 1 MHz. Test all applicable pins on 5 devices with zero failures. d. Subgroups 7 shall include verification of the truth table as specified on figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77026 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be a