DLA SMD-5962-77046 REV G-2011 MICROCIRCUIT DIGITAL CMOS QUAD 2-INPUT NAND GATE WITH SCHMITT TRIGGERS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Add vendor CAGE 34371. Add device type 02. Delete vendors CAGE 07263 and 31019. Change drawing CAGE code to 67268. Technical changes to 1.3, 1.4, table I , and table II - mbk. 90-03-30 Monica L. Poelking E Update boilerplate to MIL-PRF-38535 requ

2、irements. jak 01-05-07 Thomas M. HessF Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-02-09 Thomas M. Hess G Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-03-28 David J. Corbett CURRENT CAGE CODE 67268 REV SHET REV SHET REV

3、STATUS REV G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY A. J. Foley DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENS

4、E AMSC N/A CHECKED BY C. R. Jackson APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL, CMOS, QUAD 2-INPUT NAND GATE WITH SCHMITT TRIGGERS, MONOLITHIC SILICON DRAWING APPROVAL DATE 77-10-06 REVISION LEVEL G SIZE A CAGE CODE 14933 77046 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E287-11 Provided by IHSN

5、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 c

6、ompliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 77046 01 C A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type

7、(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4093B Quad 2-input NAND gate with Schmitt triggers 02 4093B Quad 2-input NAND gate with Schmitt triggers 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and a

8、s follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD), device

9、 type 01 . -0.5 V dc to +18.0 V dc 2/ Supply voltage range (VDD), device type 02 . -0.5 V dc to +20.0 V dc 2/ Input voltage range -0.5 V dc to VDD+ 0.5 V dc DC input current (any one input) 10 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW 3/ Lead temperatu

10、re (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VDD), device type 01 . +3.0 V dc to +15.0 V dc Supply voltage range (VDD), device type 02 . +3.0 V dc to +18.0 V

11、 dc Maximum low level input voltage (VIL): VDD= 5.0 V dc 1.5 V dc VDD= 15.0 V dc 4.0 V dc Minimum high level input voltage (VIH): VDD= 5.0 V dc 3.5 V dc VDD= 15.0 V dc 11.0 V dc Case operating temperature range (TC) . -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent da

12、mage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Supply voltages referenced to the VSSterminal. 3/ For TC= +100C to +125C, derate linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without

13、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a

14、 part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE ST

15、ANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are availab

16、le online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

17、drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level

18、 B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the

19、manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These m

20、odifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as spe

21、cified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic d

22、iagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

23、 DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full cas

24、e operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall

25、be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The

26、compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved sourc

27、e of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certifi

28、cate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this dr

29、awing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Prov

30、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test co

31、nditions -55C TC +125C unless otherwise specified Devicetype Group A subgroups Limits Unit Min Max Quiescent supply current IDDVIN= 0.0 V or VDDVDD= 5.0 V 1/ All 1, 3 1.0 A 2 30.0VDD= 10.0 V 1/ All 1, 3 2.0 2 60.0VDD= 15.0 V 1/ All 1, 3 4.0 2 120.0VDD= 20.0 V 2/ All 1, 3 20.0 2 600.0Low-level output

32、 voltage VOLVIN= 0.0 V or VDDIOL= +1 A VDD= 5.0 V 3/ All 1, 2, 3 0.05 V VDD= 10.0 V 3/ All 1, 2, 3 0.05 VDD= 15.0 V All 1, 2, 3 0.05 High-level output voltage VOHVIN= 0.0 V or VDDIOH= -1 A VDD= 5.0 V 3/ All 1, 2, 3 4.95 V VDD= 10.0 V 3/ All 1, 2, 3 9.95 VDD= 15.0 V All 1, 2, 3 14.95 High-level outpu

33、t current IOHVDD= 5.0 V VO= 4.6 V VIN= 0.0 V or VDDAll 1 -0.51 mA 2 -0.36 3 -0.64 VDD= 5.0 V VO= 2.5 V VIN= 0.0 V or VDD02 1 -1.6 2 -1.15 3 -2.0 VDD= 10.0 V 3/ VO= 9.5 V VIN= 0.0 V or VDDAll 1 -1.3 2 -0.9 3 -1.6 VDD= 15.0 V 3/ VO= 13.5 V VIN= 0.0 V or VDDAll 1 -3.4 2 -2.4 3 -4.2 Low-level output cur

34、rent IOLVDD= 5.0 V VO= 0.4 V VIN= 0.0 V or VDDAll 1 0.51 mA 2 0.36 3 0.64 VDD= 10.0 V 3/ VO= 0.5 V VIN= 0.0 V or VDDAll 1 1.3 2 0.9 3 1.6 VDD= 15.0 V 3/ VO= 1.5 V VIN= 0.0 V or VDDAll 1 3.4 2 2.4 3 4.2 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitte

35、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified D

36、evicetype Group A subgroups Limits Unit Min Max Input current IINVDD= 15.0 V VIN= 0.0 V or VDD01 1, 3 0.1 A 2 1.0 VDD= 20.0 V 2/ VIN= 0.0 V or VDD02 1, 3 0.1 2 1.0 Positive trigger threshold voltage VT+VDD= 5.0 V VO= 0.5 V IO 1 A All 1, 2, 3 2.2 3.65 V VDD= 10.0 V VO= 1.0 V IO 1 A All 1, 2, 3 4.6 7.

37、15 VDD= 15.0 V VO= 1.5 V IO 1 A All 1, 2, 3 6.8 10.8 Negative trigger threshold voltage VT-VDD= 5.0 V VO= 4.5 V IO 1 A All 1, 2, 3 0.9 2.80 V VDD= 10.0 V VO= 9.0 V IO 1 A All 1, 2, 3 2.5 5.20 VDD= 15.0 V VO= 13.5 V IO 1 A All 1, 2, 3 4.0 7.40 Input capacitance CINVIN= 0.0 V, TC= +25C, See 4.3.1c All

38、 4 7.5 pF Functional tests See 4.3.1d All 7, 8 Propagation delay time tPHL, tPLHCL= 50 pF RL= 200 k tr= tf= 20 ns See figure 4 VDD= 5.0 V 01 9 1.5 600.0 ns 10, 11 1.5 840.0 02 9 1.5 380.0 10, 11 1.5 494.0 VDD= 10.0 V 01 9 1.5 300.0 10, 11 1.5 420.0 02 9 1.5 180.0 10, 11 1.5 234.0 VDD= 15.0 V 01 9 1.

39、5 240.0 10, 11 1.5 335.0 02 9 1.5 130.0 10, 11 1.5 169.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET

40、7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified Devicetype Group A subgroups Limits Unit Min Max Transition time tTHL, tTLHCL= 50 pF RL= 200 k tr= tf= 20 ns See figure 4 VDD= 5.0 V 01 9 1.5 200.0

41、ns 10, 11 1.5 300.0 02 9 1.5 200.0 10, 11 1.5 260.0 VDD= 10.0 V 02 9 1.5 100.0 10, 11 1.5 130.0 VDD= 15.0 V 02 9 1.5 80.0 10, 11 1.5 104.0 1/ For device type 02, this parameter is guaranteed, if not tested, to the specified limits in table I. 2/ This test is performed with VDD= 18 V at TC= -55 C. 3/

42、 This parameter is guaranteed, if not tested, to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC

43、 FORM 2234 APR 97 Device types All Case outlines C, D Terminal number Terminal symbol 1 1A 2 1B 3 1Y 4 2Y 5 2A 6 2B 7 VSS8 3A 9 3B 10 3Y 11 4Y 12 4A 13 4B 14 VDDFIGURE 1. Terminal connections. (Each gate) Inputs Output A B Y L L H H L H L H H H H L H = High voltage level L = Low voltage level FIGURE

44、 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. NOTES: 1. RL = 200 k 2

45、. CL= 50 pF, includes probe and jig capacitance. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77046 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL

46、 G SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qua

47、lity conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or ac

48、quiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL