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本文(DLA SMD-5962-77052 REV L-2005 MICROCIRCUIT CMOS POSITIVE LOGIC 8-CHANNEL MULTIPLEXERS DEMULTIPLEXERS MONOLITHIC SILICON《硅单片8通道正逻辑多路复用器 信号分离器 氧化物半导体数字微型电路》.pdf)为本站会员(sofeeling205)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-77052 REV L-2005 MICROCIRCUIT CMOS POSITIVE LOGIC 8-CHANNEL MULTIPLEXERS DEMULTIPLEXERS MONOLITHIC SILICON《硅单片8通道正逻辑多路复用器 信号分离器 氧化物半导体数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED G Add case outline 2. Electrical changes in table I, 1.3, and 1.4. Editorial changes throughout. Change vendor CAGE 34371 vendor PINs and add vendor CAGE 24355. Delete vendor CAGE 32293 and add vendor CAGE 1ES66. 94-03-24 M. A. Frye H Changes in ac

2、cordance with NOR 5962-R135-95. 95-05-09 M. A. Frye J Drawing updated to reflect current requirements. Editorial changes throughout. drw 00-08-23 R. Monnin K Drawing updated to current requirements. Editorial changes throughout. drw 03-02-04 R. Monnin L Make correction to Marking paragraph 3.5. - ro

3、 05-04-05 R. Monnin CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV L L SHET 15 16 REV STATUS REV L L L L L L L L L L L L L L OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY A. J. Foley DEFENSE SUPPLY CENTER COLUMBUS STANDARD MIC

4、ROCIRCUIT DRAWING CHECKED BY C. R. Jackson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 77-10-26 MICROCIRCUIT, CMOS, POSITIVE LOGIC, 8-CHANNEL MULTIPLEXERS

5、/DEMULTIPLEXERS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL L SIZE A CAGE CODE 14933 77052 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E261-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77052 DEFENSE SUPPLY CENT

6、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The c

7、omplete PIN is as shown in the following example: 77052 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 DG508A, HI-508, ADG508

8、A CMOS, positive logic, 8-channel analog MUX/DEMUX 02 HI-508A, HI-548 CMOS, positive logic, 8-channel analog MUX/DEMUX with overvoltage protection 03 MAX358 CMOS, positive logic, 8-channel analog MUX/DEMUX with overvoltage protection 1.2.2 Case outline(s). The case outline(s) are as designated in MI

9、L-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style 2 CQCC1-N20 20 Square leadless chip carrier E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack X CDFP4-F16 16 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-3

10、8535, appendix A. 1.3 Absolute maximum ratings. Supply voltage between V+ and V-: Device type 01 +44 V dc Device types 02 and 03 . +40 V dc V+ to ground: Device type 01 +22 V dc Device types 02 and 03 . +20 V dc V- to ground: Device type 01 -22 V dc Device types 02 and 03 . -20 V dc Digital input ov

11、ervoltage range: Device types 02 and 03 . (V-) - 4.0 V dc to (V+) + 4.0 V dc Analog input overvoltage range: Device type 01 (V-) - 3.0 V dc to (V+) Analog input voltage (VS): Device type 01 (V-) - 2 V dc to (V+) + 2 V dc Device types 02 and 03 . (V-) - 20 V dc to (V+) + 20 V dc Provided by IHSNot fo

12、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77052 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings continued. Storage temperature range . -65C to

13、+150C Power dissipation (PD): Case 2 . 1.23 W at TA= +75C Case E 470 mW at TA= +75C Case F and X 725 mW at TA= +75C Derating factor: Case 2 . 12.3 mW/C above TA= +75C Case E 12.0 mW/C above TA= +75C Case F and X 8.0 mW/C above TA= +25C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Lea

14、d temperature (soldering, 10 seconds) . +300C Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Positive supply voltage (V+) . +15 V dc Negative supply voltage (V-) . -15 V dc Logic low level address input voltage (VIL) . 0 V dc to 0.8 V dc Logic high level address input voltag

15、e (VIH): Device types 01 and 03 . 2.4 V dc to (V+) - 0.7 V dc Device type 02 4.0 V dc to V+ Enable voltage (VEN): Device type 01 4.5 V dc to (V+) - 0.7 V dc Device type 02 4.0 V dc to (V+) - 0.7 V dc Device type 03 2.4 V dc to (V+) - 0.7 V dc Ambient operating temperature range (TA) . -55C to +125C

16、2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.

17、 DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS

18、MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4

19、D, Philadelphia, PA 19111-5094.) Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77052 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedenc

20、e. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirement

21、s. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has

22、 been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modificatio

23、ns to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2

24、 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall

25、 be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating te

26、mperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with

27、 the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or

28、“QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certifi

29、cate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38

30、535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the

31、option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

32、E A 77052 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ V- = -15 V, V+ = +15 V, VEN= 4.5 V Group A subgroups Device type Limits Unit -55C TA +125C unless otherwise spe

33、cified Min Max Input leakage current 2/ IIH Measure address inputs sequentially, connect all 1,2 01 +0.8 A IILunused address inputs to 5.0 V -0.8 Leakage current into the source terminal of an +IS(OFF)VS= +10 V, VEN= 0.8 V, all unused inputs = -10 V 1,2,3 01 -50 +50 nA “OFF” switch -IS(OFF)VS= -10 V

34、, VEN= 0.8 V, all unused inputs = +10 V Leakage current into the drain terminal of an +ID(OFF)VD= +10 V, VEN= 0.8 V, all unused inputs = -10 V 1,2,3 01 -250 +250 nA “OFF” switch -ID(OFF)VD= -10 V, VEN= 0.8 V, all unused inputs = +10 V Leakage current from an “ON” driver into the +ID(ON)VD= +10 V, VS

35、= -10 V, all unused inputs = -10 V 1,2,3 01 -250 +250 nA switch (drain) -ID(ON)VD= -10 V, VS= +10 V, all unused inputs = +10 V Positive supply current I(+) VA= 0 V, VEN= 5 V 1,2,3 01 +12 mA Negative supply current I(-) VA= 0 V, VEN= 5 V 1,2,3 01 -12 mA Standby positive supply current +ISBYVA= 0 V, V

36、EN= 0 V 1, 2, 3 01 +3.5 mA Standby negative supply current -ISBYVA= 0 V, VEN= 0 V 1, 2, 3 01 -3.5 mA Switch “ON” resistance RDS1VS= +10 V, ID= +1 mA 1, 3 01 400 2 500 VS= -10 V, ID= -1 mA 1, 3 400 2 500 Switch “ON” resistance RDS2V+ = +10 V, V- = -10 V, VS= +7.5 V, ID= -1 mA 1, 2, 3 01 1000 V+ = +10

37、 V, V- = +10 V, VS= -7.5 V, ID= -1 mA 1000 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77052 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 6 DSC

38、C FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditions 1/ V- = -15 V, V+ = +15 V, VEN= 4.5 V Group A subgroups Device type Limits Unit -55C TA +125C unless otherwise specified Min Max Capacitance: Address CAV+ = V- = 0 V, 3/ f = 1 MHz, TA= +25C 4 01 10 p

39、F Capacitance: output switch COSV+ = V- = 0 V, 3/ f = 1 MHz, TA= +25C 4 01 45 pF Capacitance: input switch CISV+ = V- = 0 V, 3/ f = 1 MHz, TA= +25C 4 01 10 pF Charge transfer error VCTEVS= GND, 3/ VGEN= 0 V to 5 V, f = 500 kHz, CL= 100 pF, TA= +25C 4 01 10 mV Single channel isolation VISOVGEN= 1 VP-

40、P, 3/ f = 200 kHz, TA= +25C 4 01 50 dB Crosstalk between channels VCTVGEN= 1 VP-P, 3/ f = 200 kHz, TA= +25C 4 01 50 dB Break-before-make time delay tDTA= +25C, see figure 3 9 01 5 ns Propagation delay times: Address inputs to tON(A) RL= 1 k, CL= 100 pF, 9, 11 01 1000 ns I/O channels tOFF(A)see figur

41、e 4 10 1500 Enable to I/O tON(EN)RL= 1 k, CL= 100 pF, 9, 11 01 1000 ns tOFF(EN)see figure 5 10 1500 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77052 DEFENSE SUPPLY CENTER COLUMB

42、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditions 1/ V- = -15 V, V+ = +15 V, VEN= 4.0 V Group A subgroups Device type Limits Unit -55C TA +125C unless otherwise specified Min Max Positive inpu

43、t clamping voltage VIC(POS) IIN= 1 mA, 3/ V+ = V- = 0 V, TA= +25C 1 02 +1.5 V Negative input clamping voltage VIC(NEG)IIN= -1 mA, 3/ V+ = V- = 0 V, TA= +25C 1 02 -1.5 V Input leakage current 2/ IIH Measure inputs sequentially, connect all 1,2 02 -1.0 +1.0 A IILunused inputs to GND +1.0 -1.0 Leakage

44、current into the source terminal of an “OFF” switch +IS(OFF)VS= +10 V, VEN= 0.8 V, VD= -10 V, all unused inputs = -10 V 1,2 02 -50 +50 nA -IS(OFF)VS= -10 V, VEN= 0.8 V, VD= +10 V, all unused inputs = +10 V Leakage current into the drain terminal of an +ID(OFF)VD= +10 V, VEN= 0.8 V, all unused inputs

45、 = -10 V 1,2 02 -250 +250 nA “OFF” switch -ID(OFF)VD= -10 V, VEN= 0.8 V, all unused inputs = +10 V Leakage current from an “ON” driver into the +ID(ON)VD= +10 V, VS= +10 V, all unused inputs = -10 V 1,2,3 02 -250 +250 nA switch (drain) -ID(ON)VD= -10 V, VS= -10 V, all unused inputs = +10 V +ID(OFF)o

46、ver- voltage VS= +33 V, VD= 0 V, VEN= 0.8 V 1,2,3 02 -2.0 +2.0 A Overvoltage protected, leakage current into the drain terminal of an “OFF” switch -ID(OFF)over- voltage VS= -33 V, VD= 0 V, VEN= 0.8 V Positive supply current I(+) VA= 0 V, VEN= 4 V 1,2,3 02 +2.0 mA Negative supply current I(-) VA= 0 V

47、, VEN= 4 V 1,2,3 02 -1.0 mA Standby positive supply current +ISBYVA= 0 V, VEN= 0 V 1, 2, 3 02 +2.0 mA Standby negative supply current -ISBYVA= 0 V, VEN= 0 V 1, 2, 3 02 -1.0 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

48、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77052 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditions 1/ V- = -15 V, V+ = +15 V, VEN= 4.0 V Group A subgroups Device type Limits Unit -55C TA +125C unless otherwise specified Min Max Switch “ON” resistance +RDS1VS= +10 V, ID= -100 A 1 02 1500 2,3 1800 -RDS1VS= -10 V, ID= -100 A 1 1500 2,3 1800 Difference in switch “ON” resistance between channels +RDS1(+RDS1max) (+RDS1min) x 100 / +RDS1AV

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