DLA SMD-5962-78026 REV D-2004 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL DECADE COUNTER MONOLITHIC SILICON《硅单片十进制计数器 肖脱基小功率TTL双极数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Delete normalized fanout. Change tp (IN): Inputs A and B. Change the following: fclock: Input B, IIH2, IIH3, IIL1, IIL2, fMAX1, fMAX2. Delete minimum limits from all prop. delay times. Change prop. delay time N to BDto B to QD. Change prop. delay

2、 time CLR to Q1. Change prop. delay time tPLH6and tPHL6to tPHL6only. Revise to new military format. Case E inactive for new design. Renumbered high level input current. 87-10-26 M. A. Frye C Changes in accordance with NOR 5962-R175-92. -tvn 92-04-27 Monica L. Poelking D Update to reflect latest chan

3、ges in format and requirements. Editorial changes throughout. -les 04-07-27 Raymond Monnin CURRENT CAGE CODE 67268 THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Monica L. Grose

4、l DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, DECADE COUNTER, AND AGENCI

5、ES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 79-01-23 MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 14933 78026 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E348-04 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIR

6、CUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identify

7、ing Number (PIN). The complete PIN is as shown in the following example: 78026 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 54L

8、S390 Dual decade counter with A and B inputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat 1.2.3 Lead finish. The lead fi

9、nish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at 18 mA to +5.5 V dc Storage temperature -65C to +150C Maximum power dissipation (PD) . 143 mW 1/ Lead temperature (soldering, 10 seconds) .

10、 +300C Junction temperature (TJ) +175C Thermal resistance, junction-to-case (JC): Cases E and F . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH): 2.0 V dc Maximum low lever input voltage (V

11、IL): . 0.7 V dc Case operating temperature range (TC) -55C to +125C Width of input count pulse, tp(IN): Input A 20 ns minimum Input B 40 ns minimum Width of CLEAR pulse . 20 ns minimum Input clock frequency, fclock: Input A 0 to 25 MHz Input B 0 to 12.5 MHz _ 1/ Maximum power dissipation is defined

12、as VCCX ICC, and must withstand the added PDdue to short circuit test e.g., IOS.DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 RE

13、VISION LEVEL D SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the so

14、licitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMEN

15、T OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins A

16、venue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a sp

17、ecific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer List

18、ing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flo

19、w as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL

20、-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with

21、1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3 3.3 Electrical performance characteristics. Unless ot

22、herwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for e

23、ach subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or

24、networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 3.5.1 Certification/compliance mark. A compliance indicator C shall be marked on all non-JAN devices built in compliance to MIL

25、-PRF-38535, appendix A. The compliance indicator C shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be l

26、isted as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7

27、 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9

28、 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. DSCC FORM 2234 APR 97 Provided by IHSNot for Res

29、aleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise sp

30、ecified Group A subgroups Device type Limits UnitMin MaxHigh level output voltage, VOHVCC= 4.5 V, VIL= 0.7 V, IOH= -0.4 mA, VIH= 2.0 V 1, 2, 3 All 2.5 V Low level output voltage VOLVCC= 4.5 V, VIL= 0.7 V, IOL= 4.0 mA, VIH= 2.0 V 1, 2, 3 All 0.4 V Input clamp voltage VIC VCC= 4.5 V, IIN= -18 mA, TC=

31、+25C 1 All -1.5 V High level input current at IIH1VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 20 A Clear or Set to 9 inputs IIH2VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 100 A High level input current at IIH3VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 100 A Input A or clock IIH4VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 400 A High

32、level input current at IIH5VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 200 A Input B IIH6VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 400 A Low level input current at Clear or Set to 9 inputs IIL1VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -400 A Low level input current at Input A IIL21, 2, 3 All -1.6 mA Low level input curren

33、t at Input B IIL31, 2, 3 All -2.4 mA Short circuit output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 All -15 -130 mA Supply current ICCVCC= 5.5 V, VIN= 0.0 V 1, 2, 3 All 26 mA Maximum input count fMAX1VCC= 5.0 V, CL= 15 pF 10% 2/ 9 All 25 MHz Frequency, A or CLK RL= 2 k 5%, CL= 50 pF 10% 10, 11 1

34、5 Maximum input count fMAX2VCC= 5.0 V, CL= 15 pF 10% 2/ 9 All 12.5 MHz Frequency, B RL= 2 k 5%, CL= 50 pF 10% 10, 11 7.5 Propagation delay time, tPLH1VCC= 5.0 V, CL= 15 pF 10% 9 All 20 ns A to QAPHL1RL= 2 k 5% 2/ 10, 11 28 VCC= 5.0 V, CL= 50 pF 10% 9 All 25 ns RL= 2 k 5% 2/ 10, 11 35 Propagation del

35、ay time, tPLH2VCC= 5.0 V, CL= 15 pF 10% 9 All 21 ns B to QBPHL2RL= 2 k 5% 2/ 10, 11 29 VCC= 5.0 V, CL= 50 pF 10% 9 All 26 ns RL= 2 k 5% 2/ 10, 11 36 See footnotes at end of table. DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-ST

36、ANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits UnitMin MaxPropag

37、ation delay time, tPLH3VCC= 5.0 V, CL= 15 pF 10% 9 All 39 ns B to QCPHL3RL= 2 k 5% 2/ 10, 11 55 VCC= 5.0 V, CL= 50 pF 10% 9 All 44 ns RL= 2 k 5% 2/ 10, 11 62 Propagation delay time, tPLH4 VCC = 5.0 V, CL = 15 pF 10% 9 All 21 ns B to QDPHL4RL= 2 k 5% 2/ 10, 11 29 VCC= 5.0 V, CL= 50 pF 10% 9 All 26 ns

38、 RL= 2 k 5% 2/ 10, 11 36 Propagation delay time, tPHL5VCC= 5.0 V, CL= 15 pF 10% 9 All 39 ns CLR to QRL= 2 k 5% 2/ 10, 11 55 VCC= 5.0 V, CL= 50 pF 10% 9 All 44 ns RL= 2 k 5% 2/ 10, 11 62 1/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not

39、 exceed 1 second. 2/ Propagation delay time testing and maximum clock frequency testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. DSCC FORM 2234 APR 97 P

40、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines E, F Terminal number Terminal

41、 symbol 1 1A 2 1 3 1QA4 1B 5 1QB6 1QC7 1QD8 GND 9 2QD10 2QC11 2QB12 2B 13 2QA14 2 (CLR) 15 2A 16 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBU

42、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Each counter BCD count sequence (See note A) Bi-quinary (5-2) (See note B) Output Output Count QDQCQBQACount QAQDQCQB0 L L L L 0 L L L L 1 L L L H 1 L L L H 2 L L H L 2 L L H L 3 L L H H 3 L L H H 4 L H L L 4 L H L L 5 L H L

43、H 5 H L L L 6 L H H L 6 H L L H 7 L H H H 7 H L H L 8 H L L L 8 H L H H 9 H L L H 9 H H L L NOTES: A. Output QAis connected to input B for BCD count. B. Output QDis connected to input A for bi-quinary count. FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction

44、 or networking permitted without license from IHS-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78026 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

45、appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. Th

46、e test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the inten

47、t specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requir

48、ements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality co