DLA SMD-5962-79013 REV G-2011 MICROCIRCUIT DIGITAL CMOS BUFFERED TRIPLE 3-INPUT NAND GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Inactivate case outline “C” for new design. 85-07-11 N. A. Hauck D Add device type 02. Convert to SMD format. Technical changes to table I. Editorial changes throughout. 94-02-04 Monica L. Poelking E Update boilerplate to MIL-PRF-38535 requiremen

2、ts. jak 01-05-07 Thomas M. Hess F Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-01-14 Thomas M. Hess G Correct truth table on figure 2. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-06-22 David J. Corbett CURRENT CAGE CODE

3、67268 REV SHET REV SHET REV STATUS REV G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY A. J. Foley DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF T

4、HE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY C. R. Jackson APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, CMOS, BUFFERED TRIPLE 3-INPUT NAND GATE, MONOLITHIC SILICON DRAWING APPROVAL DATE 79-05-15 REVISION LEVEL G SIZE A CAGE CODE 14933 79013 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E380-11 Provided

5、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-S

6、TD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 79013 01 C A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Dev

7、ice type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4023B Buffered triple 3-input NAND gate 02 14023B Buffered triple 3-input NAND gate 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Ou

8、tline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD) -0.5 V dc to +18.0 V

9、 dc 2/ Input voltage range (VIN) -0.5 V dc to VDD+ 0.5 V dc Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Re

10、commended operating conditions. Supply voltage range (VDD) +3.0 V dc to +15.0 V dc Case operating temperature range (TC) . -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect

11、 reliability. 2/ Voltages referenced to the VSSterminal. 3/ For TC= +100C to +125C, derate linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO

12、43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these

13、documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic

14、 Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk,

15、700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulation

16、s unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manu

17、facturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535.

18、 This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accord

19、ance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in acc

20、ordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circui

21、t. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FO

22、RM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shal

23、l be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as

24、listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with M

25、IL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and

26、Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be pr

27、ovided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acqui

28、ring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

29、 MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Devicetype Group A subgroups Limits Unit Min Max Hig

30、h-level output voltage VOHVIN= 0.0 V or VDDIOH= -1 A VDD= 5.0 V All 1, 2, 3 4.95 V VDD= 10.0 V All 1, 2, 3 9.95 VDD= 15.0 V All 1, 2, 3 14.95 Low-level output voltage VOLVIN= 0.0 V or VDDIOL= +1 A VDD= 5.0 V All 1, 2, 3 0.05 V VDD= 10.0 V All 1, 2, 3 0.05 VDD= 15.0 V All 1, 2, 3 0.05 High-level inpu

31、t voltage VIHVDD= 5.0 V VO= 0.5 V or 4.5 V All 1, 2, 3 3.5 V VDD= 10.0 V VO= 1.0 V or 9.0 V All 1, 2, 3 7.0 VDD= 15.0 V IOH= -1 A VO= 1.5 V or 13.5 V All 1, 2, 3 11.0 Low-level input voltage VILVDD= 5.0 V VO= 0.5 V or 4.5 V All 1, 2, 3 1.5 V VDD= 10.0 V VO= 1.0 V or 9.0 V All 1, 2, 3 3.0 VDD= 15.0 V

32、 IOL= +1 A VO= 1.5 V or 13.5 V All 1, 2, 3 4.0 High-level output current IOHVDD= 5.0 V VO= 4.6 V VIN= 0.0 V or 5.0 V All 1 -0.2 mA 2 -0.14 3 -0.25 VDD= 10.0 V VO= 9.5 V VIN= 0.0 V or 10.0 V All 1 -0.5 2 -0.35 3 -0.62 VDD= 15.0 V VO= 13.5 V VIN= 0.0 V or 15.0 V All 1 -1.5 2 -1.1 3 -1.8 Low-level outp

33、ut current IOLVDD= 5.0 V VO= 0.4 V VIN= 0.0 V or 5.0 V All 1 0.51 mA 2 0.36 3 0.64 VDD= 10.0 V VO= 0.5 V VIN= 0.0 V or 10.0 V All 1 1.3 2 0.9 3 1.6 VDD= 15.0 V VO= 1.5 V VIN= 0.0 V or 15.0 V All 1 3.4 2 2.4 3 4.2 Input current IINVIN= 0.0 V or 15.0 V All 1, 3 0.1 A 2 1.0 See footnotes at end of tabl

34、e. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued.

35、Test Symbol Test conditions -55C TC +125C unless otherwise specified Devicetype Group A subgroups Limits Unit Min Max Quiescent supply current IDDVIN= 0.0 V or VDDVDD= 5.0 V All 1, 3 0.25 A 2 7.5VIN= 0.0 V or VDDVDD= 10.0 V All 1, 3 0.5 2 15.0VIN= 0.0 V or VDDVDD= 15.0 V All 1, 3 1.0 2 30.0Input cap

36、acitance CINVIN= 0.0 V, See 4.4.1c All 4 7.5 pF Functional tests See 4.4.1d All 7, 8 Propagation delay time, high-to-low level tPHLCL= 50 pF, VDD= 5.0 V RL= 200 k 1/ 01 9 13 250 ns 02 30001 10, 11 19 375 02 450Propagation delay time, low-to-high level tPLHCL= 50 pF, VDD= 5.0 V RL= 200 k 1/ 01 9 13 2

37、50 ns 02 30001 10, 11 19 375 02 450Transition time tTHL, tTLHCL= 50 pF, VDD= 5.0 V RL= 200 k 1/ 01 9 10 200 ns 02 20001 10, 11 15 300 02 3001/ RLvalue pertains to device type 01 only Device types 01 and 02 Case outlines C and D Terminal number Terminal symbol 1 1A 2 1B 3 2A 4 2B 5 2C 6 2Y 7 VSS8 1C9

38、 1Y 10 3Y 11 3A 12 3B 13 3C 14 VDD FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR

39、97 Each gate Inputs Output A B C Y L L L H L L H H L H L H L H H H H L L H H L H H H H L H H H H L H = High logic level L = Low logic level FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO

40、CIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 NOTE: CL= 50 pF RL= 200 k FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

41、DARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall

42、be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the m

43、anufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.

44、(2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgr

45、oups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1, 2, 3, 9 1/ Group A test requirements (method 5005) 1, 2, 3, 4, 7, 8, 9, 10, 11 2/ Groups C and D end-point electrical parameters (method 500

46、5) 1, 2, 3 1/ PDA applies to subgroup 1. 2/ Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspection

47、s. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CINmeasurement) shall be measured only for the initial test and after process or

48、 design changes which may affect input capacitance. d. Subgroups 7 and 8 shall include verification of the truth table as specified on figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79013 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 10 DSCC FORM 2234 APR 97 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state li