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本文(DLA SMD-5962-79015 REV K-2011 MICROCIRCUIT DIGITAL CMOS DIFFERENTIAL 4-CHANNEL ANALOG MULTIPLEXER DEMULTIPLEXER MONOLITHIC SILICON.pdf)为本站会员(arrownail386)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-79015 REV K-2011 MICROCIRCUIT DIGITAL CMOS DIFFERENTIAL 4-CHANNEL ANALOG MULTIPLEXER DEMULTIPLEXER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Remove one vendor FSCM - 04713. Editorial changes throughout. 84-03-22 Monica L. Poelking C Table I: Remove minimum ac limits and change tPHLand tPLHlimits.84-05-14 Monica L. Poelking D Add vendor CAGE 34371. Remove vendor CAGE 07263. Technical c

2、hanges in 1.3, 1.4, and table I. Change to military drawing format. Change drawing CAGE code to 67268. Add device type 02. Editorial changes throughout90-03-26 Monica L. Poelking E Changes in accordance with NOR 5962-R107-92. 92-01-10 Monica L. Poelking F Redrawn with changes. Add device type 03. Te

3、chnical changes to table I. Update boilerplate. Editorial changes throughout.94-01-13 Monica L. Poelking G Changes in accordance with NOR 5962-R151-94. LTG 94-04-20 Monica L. PoelkingH Incorporate revision G. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 03-08-1

4、9 Thomas M. Hess J Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-01-14 Thomas M. Hess K Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-06-22 David J. Corbett CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV K K K K K

5、 K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE A

6、MSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, CMOS, DIFFERENTIAL 4-CHANNEL ANALOG MULTIPLEXER/ DEMULTIPLEXER, MONOLITHIC SILICON DRAWING APPROVAL DATE 79-05-15 REVISION LEVEL K SIZE A CAGE CODE 14933 79015 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E375-11

7、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements

8、for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 79015 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)

9、1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4052B Differential 4-channel analog multiplexer/demultiplexer 02 2B Differentia 4-chan analog multiplexer/demultiplexer 03 14052B Differentia 4-channel analog multiplexer

10、/demultiplexer 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-lineF GDFP2-F16 or CDFP3-F16 16 Flat pack 1.2.3 Lead finish. The lead finish is as specified i

11、n MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD): Device types 01 and 03 -0.5 V dc to +18 V dc 2/ Device type 02 -0.5 V dc to +20 V dc 2/ Input voltage range -0.5 V dc to VDD+ 0.5 V dc DC input current . 10 mA Storage temperature range -65C to +150C Maximum po

12、wer dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VDD): Device types 01 and 03 +3.0 V dc to +15 V dc Device type

13、02 +3.0 V dc to +18 V dc Case operating temperature range (TC) . -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Voltages referenced to the VSSterminal. 3

14、/ For TC= +100C to +125C, derate linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FORM 2234 APR 97

15、2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.

16、 DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS

17、MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-50

18、94.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIR

19、EMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacture

20、r or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM

21、) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the Q

22、ML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections.

23、 The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be a

24、s specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characterist

25、ics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electric

26、al tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-BUL-103 (see 6.6 herein). 3.5.1 Certific

27、ation/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is us

28、ed. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of

29、supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this

30、 drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufactu

31、rers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIM

32、E COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Quiescent supply current IDDVDD= 5 V 1/ VIN= 0.0 V or VDD1

33、, 3 All 5.0 A 2 150VDD= 10 V 1/ VIN= 0.0 V or VDD1, 3 All 10.0 2 300VDD= 15 V 1/ VIN= 0.0 V or VDD1, 3 All 20.0 2 600VDD= 20 V 2/ VIN= 0.0 V or VDD1, 3 02 100 2 3000Low level input voltage VILVDD= 5 V, VEE= VSSRL= 1 k to VSSIIS 2 A on all off channels 1, 2, 3 All 1.5 V VDD= 10 V RL= 1 k to VSS3/ IIS

34、 2 A on all off channels 1, 2, 3 All 3.0 VDD= 15 V RL= 1 k to VSS IIS 2 A on all off channels 1, 2, 3 All 4.0 High level input voltage VIHVDD= 5 V RL= 1 k to VSS IIS 2 A on all off channels 1, 2, 3 All 3.5 V VDD= 10 V RL= 1 k to VSS3/ IIS 2 A on all off channels 1, 2, 3 All 7.0 VDD= 15 V RL= 1 k to

35、VSS IIS 2 A on all off channels 1, 2, 3 All 11.0 Input current IIN VDD= 15 V VIN= 0.0 V or VDD1, 3 01, 03 0.1 A 2 1.0 VDD= 20 V VIN= 0.0 V or VDD2/ 1, 3 02 0.1 2 1.0 Input capacitance CINVIN= 0.0 V TC= +25C See 4.3.1c 4 All 7.5 pF Functional test See 4.3.1d 7 All See footnotes at end of table. Provi

36、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Sym

37、bol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max On-state resistance RONVDD= 5.0 V 1 01 2500 2 35003 2000 1 02, 03 1050 2 13003 800 VDD= 10 V 1 01 500 2 6603 340 1 02 400 2 5503 310 1 03 500 2 5503 400 VDD= 15 V 1 01 280 2 4003 220 1 02 24

38、0 2 3203 200 1 03 280 2 3203 220 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 7 DSCC FORM 2234 APR 97

39、TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, signal input to output tPHL1, tPLH1RL= 200 k CL= 50 pF tr= tf= 20 ns See figure 4 5/ VDD= 5 V 9 0

40、1 60 ns 10, 11 90 9 02 4/ 1.5 60 10, 11 1.5 90 9 03 75 10, 11 3/ 112.5VDD= 10 V 9 01 35 10, 11 3/ 509 02 4/ 1.5 30 10, 11 1.5 45 9 03 3/ 35 10, 11 50 VDD= 15 V 9 01 3/ 25 10, 11 35 9 02 4/ 1.5 20 10, 11 1.5 30 9 03 3/ 25 10, 11 37.5 Propagation delay time, address to signal output tPHL2, tPLH2RL= 10

41、 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 9 01 1000 ns 10, 11 1400 9 02 1.5 720 10, 11 1.5 1080 9 03 650 10, 11 3/ 975VDD= 10 V 9 01 360 10, 11 505 9 02 3/ 1.5 320 10, 11 1.5 480 9 03 3/ 260 10, 11 390 VDD= 15 V 9 01 3/ 240 10, 11 335 9 02 3/ 1.5 240 10, 11 1.5 360 9 03 3/ 180 10, 11 270 See

42、footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance chara

43、cteristics - Continued. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, inhibit to signal out (channel turning ON) tPZH, tPZLRL= 10 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 9 01 1200 ns 10, 11 1800 9

44、 02 1.5 720 10, 11 1.5 1080 9 03 600 10, 11 3/ 900VDD= 10 V 9 01 450 10, 11 630 9 02 3/ 1.5 320 10, 11 1.5 480 9 03 3/ 310 10, 11 465 VDD= 15 V 9 01 3/ 320 10, 11 450 9 02 3/ 1.5 240 10, 11 1.5 360 9 03 3/ 250 10, 11 375 Propagation delay time, inhibit to signal out (channel turning OFF) tPHZ, tPLZR

45、L= 1 k CL= 50 pF tr= tf= 20 ns See figure 4 5/ VDD= 5 V 9 01 420 ns 10, 11 630 9 02 1.5 450 10, 11 1.5 675 9 03 600 10, 11 3/ 900VDD= 10 V 9 01 200 10, 11 280 9 02 3/ 1.5 210 10, 11 1.5 315 9 03 3/ 310 10, 11 465 VDD= 15 V 9 01 3/ 150 10, 11 210 9 02 3/ 1.5 160 10, 11 1.5 240 9 03 3/ 250 10, 11 375

46、See footnotes on next page. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79015 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance char

47、acteristics - Continued. 1/ Guaranteed, if not tested, to the specified limits, for device type 02. 2/ This test is performed at VDD= 18 V at -55C. 3/ Guaranteed, if not tested, to the specified limits. 4/ Guaranteed by RONtest as specified in table I. 5/ For device type 03, RL= 10 k. Device types 0

48、1, 02, and 03 Case outlines E and F Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Y0 Y2 Y Y3 Y1 INHIBIT VEEVSSB A X3 X0 X X1 X2 VDDFIGURE 1. Terminal connections. Inhibit Select On switches B A L L L L H L L H H X L H L H X Y0 Y1 Y2 Y3 None X0 X1 X2 X3 None H = High voltage level L = Low voltage level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

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