1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Change VILto 0.7 V. Change minimum clock pulse width, VOH2test conditions, FMAX, and propagation delays. Delete min limits from IILand propagation delays. Convert to military drawing format. 86-12-10 N. A. Hauck D Change clock pulse width to read
2、 22 ns for all cases for device 01. Correct VIC= 1.5 V to -1.5 V. Delete IOZHand IOZLtests. Change tPLH2= 20 ns to 21 ns. For truth tables, clear mode, delete the third row for both devices. For logic diagram delete inversion circle for clear input amplifier and add inversion circles for both pairs
3、of amplifiers on S1 and S0. 87-05-04 N. A. Hauck E Changes in accordance with NOR 5962-R082-92. -pn 92-07-06 Monica L. Poelking F Changes in accordance with NOR 5962-R051-96. -tmh 96-02-02 Monica L. Poelking G Update to reflect latest changes in format and requirements. Editorial changes throughout.
4、 -les 02-10-09 Raymond Monnin H Update to reflect latest changes in format and requirements. Correct paragraph in 3.5. Editorial changes throughout. les 05-07-21 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV H H H H
5、 H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N.
6、 A. Hauck MICROCIRCUIT, DIGITAL, ADVANCED LOW-POWER SCHOTTKY TTL, SHIFT REGISTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-02-17 MONOLITHIC SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 83021 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E393-05 Provided by IHSNot for
7、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-88
8、3 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 83021 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device t
9、ype. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS299 8-bit bi-directional universal shift/storage register with three-state outputs and asynchronous clear 02 54ALS323 8-bit bi-directional universal shift/storage register and three-sta
10、te outputs with synchronous clear 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 dual-in-line S GDFP2-F20 or CDFP3-F20 20 flat 2 CQCC1-N20 20 square chip carrier 1.2.3
11、Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range -1.5V dc at -18 mA to +7.0 V dc I/O Ports . 5.5 V dc maximum Storage temperature range -65C to +150C Maximum power dissipation (PD) per
12、 device 1/ . 220 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC): Cases R, S, and 2 See MIL-STD-1835 Junction temperature (TJ) +175C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit test; e.g., IO
13、S. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage
14、 range (VCC) . +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C to +125C Minimum clock pulse width (tw) : Device type 01: Case R 22 ns Case S and 2 22 ns Device type 02
15、: Cases R, S, and 2 . 20 ns Minimum clear pulse width: Device type 01 12 ns Minimum clear inactive state pulse width: Device type 01 15 ns Minimum clear pulse data setup time: Device type 02: Low (active) . 25 ns High (inactive) . 18 ns Minimum setup time at select (S0, S1) . 25 ns Minimum setup tim
16、e: High level data (SL, SR, A - H) . 18 ns Low level data (SL, SR, A - H) 15 ns Minimum hold time (S0, S1, SL, SR, A - H): Device type 01 0 ns Device type 02 1 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks for
17、m a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE
18、 STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are avai
19、lable online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references
20、cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI
21、T DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specif
22、ied herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved p
23、rogram plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not a
24、ffect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535,
25、 appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagrams. The logic dia
26、grams shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electri
27、cal test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers
28、PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to i
29、dentify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an
30、 approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircui
31、ts delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable req
32、uired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-
33、3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min MaxHigh level output voltage (Q outputs) VOH1VCC= 4.5 V, VIN= 0.7 or 2.0 V, IOH= -1.0 mA 1
34、, 2, 3 All 2.4 V High level output voltage (All other outputs) VOH2IOH= -0.4 mA 2.5 Low-level output voltage (QA-QH) VOL1 VCC= 4.5 V, VIN= 0.7 or 2.0 V, IOL= 12 mA 1, 2, 3 All 0.4 V Low-level output voltage (QA or QH) VOL2 IOL= 4 mA 1, 2, 3 All 0.4 V Input clamp voltage VIC VCC = 4.5 V TC = +25C IIN
35、= -18 mA 1 All -1.5 V All others -200 Low level input current IIL VCC= 5.5 V, VIN= 0.4 V, G1, G 2, CLK, CLR 1, 2, 3 All -100 A High level input current IIH1 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 All 20 A High level input current (A-H) IIH2 VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 100 A High level input current (
36、Any other) IIH3 VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 All 100 A Output current 1/ IOVCC= 5.5 V, VOUT= 2.25 V QA-QH 1, 2, 3 All -20 -112 mA QA, QH 1, 2, 3 All -15 -70 Supply current, outputs high ICCH VCC= 5.5 V, VIN= 5.0 V 1, 2, 3 All 28 mA Supply current, outputs low ICCL VCC = 5.5 V, VIN = 0 V 1, 2, 3 Al
37、l 38 mA Supply current outputs disabled ICCZ VCC = 5.5 V, VIN = 5.0 V 1, 2, 3 All 40 mA Maximum clock frequency fMAX VCC= 5.0 V 9, 10, 11 All 17 MHz Propagation delay time, tPLH1 VCC= 5.0 V, 9, 10, 11 All 19 ns clock QA-QH tPHL1 CL = 50 pF 10%, 9, 10, 11 All 25 ns Propagation delay time, tPLH2 RL =
38、500 5% 9, 10, 11 All 21 ns clock QA-QH tPHL2 9, 10, 11 All 25 ns Propagation delay time, high to low, clear to QA-QH tPHL3 9, 10, 11 01 29 ns Propagation delay time, high to low, clear to QA-QH tPHL4 9, 10, 11 01 29 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or ne
39、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C unless ot
40、herwise specified Group A subgroupsDevice type Limits Unit Min MaxEnable time, G to QA-QH tPZH1 VCC= 5.0 V, 9, 10, 11 01 22 ns tPZL1 CL = 50 pF 10%, 9, 10, 11 01 27 ns Enable time, S0 to QA-QH tPZH3 RL = 500 5% 9, 10, 11 01 27 ns PZL3 9, 10, 11 01 27 ns Enable time, S1 to QA-QH tPZH4 9, 10, 11 01 27
41、 ns tPZL4 9, 10, 11 01 27 ns Disable time, G to QA-QH tPHZ1 9, 10, 11 01 15 ns PLZ1 9, 10, 11 01 38 ns Disable time, S0 to QA-QH tPHZ3 9, 10, 11 01 18 ns tPLZ3 9, 10, 11 01 34 ns Disable time, S1 to QA-QH tPHZ4 9, 10, 11 01 18 ns PLZ4 9, 10, 11 01 34 ns 1/ The output conditions have been chosen to p
42、roduce a current that closely approximates one half of the true short circuit output current, IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REV
43、ISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 Device types 01, 02 01, 02 Case outlines R, S 2 Terminal number Terminal symbols 1 S0 S0 2 G1 G1 3 G2 G2 4 G/QG G/QG 5 E/QE E/QE 6 C/QC C/QC 7 A/QA A/QA 8 QA QA 9 CLR CLR 10 GND GND 11 SR SR 12 CLK CLK 13 B/QB B/QB 14 D/QD D/QD 15 F/QF F/QF 16 H/QH H/QH 17
44、 QH QH 18 SL SL 19 S1 S1 20 VCCVCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83021 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 8 DSCC FORM 2
45、234 APR 97 Device type 01 INPUTS INPUTS/OUTPUTS OUTPUTS MODE CLEAR FUNCTION SELECT OUTPUT CONTROL 1/ CLOCK SERIAL A/QA B/QB C/QC D/QD E/QE F/QF G/QG H/QH QA QH S1 SQ G1 G2 SL SR CLEAR L X L L L X X X L L L L L L L L L L L L X L L X X X L L L L L L L L L L HOLD H L L L L X X X QAO QBO QCO QDO QEO QFO
46、 QGO QHO QAO QHO H X X L L L X X QAO QBO QCO QDO QEO QFO QGO QHO QAO QHO SHIFT H L H L L X H H QAn QBn QCn QDn QEn QFn QGn H QGn RIGHT H L H L L X L L QAn QBn QCn QDn QEn QFn QGn L QGn SHIFT H H L L L H X QBn QCn QDn QEn QFn QGn QHn H QBn H LEFT H H L L L L X QBn QCn QDn QEn QFn QGn QHn L QBn L LOAD
47、 H H H X X X X A B C D E F G H A H 1/ When one or both output controls are high the eight input/output terminals are disabled to the high-impedance state; however sequential operation or clearing of the register is not affected. Device type 02 INPUTS INPUTS/OUTPUTS OUTPUTS MODE CLEAR FUNCTION SELECT
48、 OUTPUT CONTROL 1/ CLOCK SERIAL A/QA B/QB C/QC D/QD E/QE F/QF G/QG H/QH QA QH S1 SQ G1 G2 SL SR CLEAR L X L L L X X L L L L L L L L L L L L X L L X X L L L L L L L L L L HOLD H L L L L X X X QAO QBO QCO QDO QEO QFO QGO QHO QAO QHO H X X L L L X X QAO QBO QCO QDO QEO QFO QGO QHO QAO QHO SHIFT H L H L L X H H QAn QBn QCn QDn QEn QFn QGn H QGn RIGHT H L H L L X L L QAn QBn QCn QDn QEn QFn QGn L QGn SHIFT H H L L L H X QBn QCn QDn QEn QFn QGn QHn H QBn H LEFT H H L L L L X QBn QCn QDn QEn QFn QGn QHn L QBn L LOAD H H H X X X X
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