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本文(DLA SMD-5962-84038 REV G-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS TRIPLE 3-INPUT NAND GATE MONOLITHIC SILICON.pdf)为本站会员(terrorscript155)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-84038 REV G-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS TRIPLE 3-INPUT NAND GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Add vendor CAGE F8859. Add device class V criteria. Correct data limits in paragraph 1.3. Add case outline X. Add table III, delta limits. Update boilerplate. jak 00-07-11 Monica L. Poelking F Correct table II. Update boilerplate to MIL-PRF-38535

2、 requirements. jak 02-01-25 Thomas M. Hess G Change address. Add JEDEC Standard 7-A reference in paragraphs 2.2 and 4.4.1c. Update boilerplate paragraphs to the current requirements in as specified in MIL-PRF-38535. - jak 09-08-17 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS

3、 REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg A. Pitz DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTME

4、NTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, TRIPLE 3-INPUT NAND GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-05-14 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 14933 84038 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E425-09 Provided b

5、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84038 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance

6、class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is r

7、eflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84038 01 C A Drawing number Device type Case outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) For device class V: 5962 - 84038 01 V X A Federal RHA Device Device Case Lead stock class desi

8、gnator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device

9、 class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit functio

10、n 01 54HC10 Triple 3-input NAND gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators

11、 will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and q

12、ualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84038 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). Th

13、e case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style A GDFP5-F14 14 Flat pack B GDFP4-F14 14 Flat packC GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack X CDFP3-F14 14 Flat pack2 CQCC1-N20 20 Squ

14、are leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to

15、 VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp current (IIK) (VINVCC) . 20 mA Output clamp current (IOK) (VOUTVCC) . 20 mA Continuous output current (IOUT) (VOUT= 0.0 to VCC) 25 mA Continuous current through VCCor GND . 50 mA Storage temperature range (TSTG) . -

16、65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case ope

17、rating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance

18、 and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum juncti

19、on temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84038 DEFENSE SU

20、PPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless other

21、wise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1

22、835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist

23、.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these docume

24、nts are those cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices (Copies of these documents are available online at http:/www.eia.org or from the Electronic Industries A

25、lliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations un

26、less a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification

27、in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The

28、design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The term

29、inal connections shall be as specified on figure 1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84038 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3.2

30、.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4. 3.3 Electrical performance characterist

31、ics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical te

32、st requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PI

33、N number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device c

34、lass M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3

35、.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacture

36、r in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirem

37、ents of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided

38、with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification

39、 and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit grou

40、p assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84038 DEFEN

41、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVIN= VIHminim

42、um or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -4.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A VCC= 2.0

43、 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA VCC= 4.5 V 1 0.26 2, 3 0.40 VIN= VIHminimum or VILmaximum IOL= +5.2 mA VCC= 6.0 V 1 0.26 2, 3 0.40 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage

44、 VIL 2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C, VCC= 2.0 V to 6.0 V, See 4.4.1c 4 10.0 pF Quiescent supply current ICCVIN= VCC or 0.0 V VCC= 6.0 V IOUT= 0.0 A 1 2.0 A 2, 3 40.0 Input leakage current IINVIN= VCCor 0.0 V VCC= 6.0 V 1 100.0 nA 2

45、, 3 1000.0Power dissipation capacitance CPDSee 4.4.1c 4 25.0 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84038 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISIO

46、N LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Functional tests See 4.4.1b 7, 8 L H Propagation delay time, mA, mB, or mC to mY tPLH, tP

47、HL 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 95.0 ns VCC= 4.5 V 19.0 VCC= 6.0 V 16.0 TC= -55C and +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 145.0 ns VCC= 4.5 V 29.0 VCC= 6.0 V 25.0 Transition time, high to low, low to high tTHL, tTLH 4/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 75.0 ns

48、 VCC= 4.5 V 15.0 VCC= 6.0 V 13.0 TC= -55C and +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 110.0 ns VCC= 4.5 V 22.0 VCC= 6.0 V 19.0 1/ For a power supply of 5.0 V 10, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V respectively. (The VIHvalue at 5.5 V is 3.85 V.) The worst case leakage currents (IINand ICC)

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