DLA SMD-5962-84048 REV G-2013 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS TRIPLE 3-INPUT AND GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Convert to military drawing format. Add case outline 2 (square chip carrier package) for vendor CAGE (27014). Remove vendor from case A and add to case D. Devices 01CX and 012X inactive for new design, use M38510/65204BCX and M38510/65204B2X. Cha

2、nge code ident. no. to 67268. Editorial changes throughout. 88-03-24 M. A. Frye D Update boilerplate to MIL-PRF-38535 requirements. - CFS 01-08-28 Thomas M. Hess E Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. - LTG 05-03-17 Thomas M. Hess F Change boilerplate to ad

3、d device class V criteria. - jak 06-10-26 Thomas M. Hess G Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-11-22 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PRE

4、PARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY M. A. Frye MICROCIRCUIT,

5、DIGITAL, HIGH-SPEED CMOS, TRIPLE 3-INPUT AND GATE, MONOLITHIC SILICON DRAWING APPROVAL DATE 84-05-07 REVISION LEVEL G SIZE A CAGE CODE 14933 84048 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E050-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

6、RD MICROCIRCUIT DRAWING SIZE A 84048 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class

7、V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device class M and Q: 84

8、048 01 C A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) For device class V: 5962 - 84048 01 V C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (s

9、ee 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the

10、 appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC11 Triple 3-input AND gate 1.2.3 Device class designator. The device class designator is a single

11、letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements docu

12、mentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 a

13、nd as follows: Outline letter Descriptive designator Terminals Package style A GDFP5-F14 or CDFP6-F14 14 Flat pack B GDFP4-F14 14 Flat pack C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier Provided by IHSNot for ResaleNo repro

14、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84048 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL

15、-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC + 0.5 V dc Clamp diode current. 20 mA DC output current (per

16、pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended

17、 operating conditions. 2/ 3/ Supply voltage range (VDD) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time: VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns _ 1/ Stresses above the absolute maximum rating may cause permanen

18、t damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature r

19、ange of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networki

20、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84048 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards,

21、and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPA

22、RTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these d

23、ocuments are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless ot

24、herwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.j

25、edec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this do

26、cument, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device

27、 manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified h

28、erein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in acco

29、rdance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit

30、. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84048 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FOR

31、M 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range

32、. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be ma

33、rked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be i

34、n accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall

35、 be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certifica

36、te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the

37、 manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

38、 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired

39、 to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required do

40、cumentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for Re

41、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84048 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125

42、C unless otherwise specified 1/ Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH = 20 A VCC=2.0 V 1, 2, 3 1.9 V VCC=4.5 V 4.4 VCC=6.0 V 5.9 VIN= VIHor VILIOH= 4.0 mA VCC=4.5 V 3.7 VIN= VIHor VILIOH= 5.2 mA VCC=6.0 V 5.2 Low level output voltage VOLVIN= VIHor VILIO

43、L= +20 A VCC=2.0 V 1, 2, 3 0.1 V VCC=4.5 V 0.1 VCC=6.0 V 0.1 VIN= VIHor VILIOL= +4.0 mA VCC=4.5 V 0.4 VIN= VIHor VILIOL= +5.2 mA VCC=6.0 V 0.4 High level input voltage VIH2/ VCC=2.0 V 1, 2, 3 1.5 V VCC=4.5 V 3.15 VCC=6.0 V 4.2 Low level input voltage VIL2/ VCC=2.0 V 1, 2, 3 0.3 V VCC=4.5 V 0.9 VCC=6

44、.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C See 4.4.1c 4 10 pF Quiescent supply current ICCVCC= 6.0 V VIN= VCCor GND 1, 2, 3 40 A Input leakage current IINVCC= 6.0 V VIN= VCCor GND 1, 2, 3 1.0 A Functional tests See 4.4.1d 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo re

45、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84048 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +

46、125C unless otherwise specified 1/ Group A subgroups Limits Unit Min Max Propagation delay time, input to output, high-to-low, low-to-high tPHL, tPLH3/ TC= +25C CL= 50 pF 10% See figure 4 VCC=2.0 V 9 125 ns VCC=4.5 V 25 VCC=6.0 V 21 TC= -55C and +125C CL= 50 pF 10% See figure 4 VCC=2.0 V 10, 11 190

47、ns VCC=4.5 V 38 VCC=6.0 V 32 Transition time high-to-low, low-to-high tTHL, tTLH4/ TC= +25C CL= 50 pF 10% See figure 4 VCC=2.0 V 9 75 ns VCC=4.5 V 15 VCC=6.0 V 13 TC= -55C and +125C CL= 50 pF 10% See figure 4 VCC=2.0 V 10, 11 110 ns VCC=4.5 V 22 VCC=6.0 V 19 1/ For a power supply of 5 V 10% the wors

48、t case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V respectively. (The VIHvalue at 5.5 V is 3.85 V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage, and so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 20 pF, determines the no load dynamic power consumption, PD= CPDVCC2+ ICCVCC, and the no load dynamic current consumption, IS= CPDVCCf + ICC. 2/ VIHand VILtests are