DLA SMD-5962-84096 REV H-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS OCTAL BUFFER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Add vendor CAGE F8859. Add device class V criteria. Correct data limits in paragraph 1.3 and IINtest conditions in table I. Add case outline X. Add table III, delta limits. Update boilerplate. jak 00-07-12 Monica L. Poelking F Correct data in tab

2、le II. Update boilerplate to MIL-PRF-38535 requirements. - jak 01-12-04 Thomas M. Hess G Correct table II. jak 02-02-04 Thomas M. Hess H Add JEDEC Standard 7-A reference in paragraphs 2.2 and 4.4.1c. Update boilerplate paragraphs to the current requirements as specified in MIL-PRF-38535. - jak 09-09

3、-02 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV H H SHEET 15 16 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rodger Mell DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 4

4、3218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL BUFFER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-10-10 AMSC N/A REVISION L

5、EVEL H SIZE A CAGE CODE 14933 84096 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E444-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H

6、SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Ident

7、ifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84096 01 R A Drawing number Device type Case outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5)

8、 For device class V: 5962 - 84096 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet th

9、e MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The devi

10、ce type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC244 Octal buffer with three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device cl

11、ass designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant

12、, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84096 DEFENSE SUPPLY CENTE

13、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3

14、-F20 20 Flat pack X See figure 1 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC)

15、-0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp current (IIK) (VINVCC) . 20 mA Output clamp current (IOK) (VOUTVCC) . 20 mA Continuous output current (IOUT) (VOUT= 0.0 to VCC) 35 mA Continuous curren

16、t through VCCor GND . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions.

17、2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device.

18、Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of -55C to +125C. 4/ For

19、TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license f

20、rom IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a

21、part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STAN

22、DARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available

23、 online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise s

24、pecified, the issues of these documents are those cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices (Copies of these documents are available online at http:/www.eia.org

25、 or from the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersede

26、s applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Man

27、agement (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, constru

28、ction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with figure 1 and 1

29、.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

30、IZE A 84096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in

31、figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.

32、4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked

33、. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in ac

34、cordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be

35、a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate o

36、f compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers produc

37、t meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class

38、M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any c

39、hange that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at t

40、he option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

41、-STANDARD MICROCIRCUIT DRAWING SIZE A 84096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified M

42、in Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -6.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHminimum or VILmaximum IOH= -7.8 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low level output voltage VOL

43、VIN= VIHminimum or VILmaximum IOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +6.0 mA VCC= 4.5 V 1 0.26 2, 3 0.40 VIN= VIHminimum or VILmaximum IOL= +7.8 mA VCC= 6.0 V 1 0.26 2, 3 0.40 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC=

44、4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage VIL 2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C, See 4.4.1c, VCC= 2.0 V to 6.0 V 4 10.0 pF Output capacitance COUTVOUT= 0.0 V, TC= +25C, See 4.4.1c, VCC= 2.0 V to 6.0 V 4 20.0 pF Quiescent suppl

45、y current ICCVIN= VCC or GND VCC= 6.0 V IOUT= 0.0 A 1 8.0 A 2, 3 160.0 Input leakage current IINVIN= VCCor GND VCC= 6.0 V 1 100.0 nA 2, 3 1000.0See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI

46、NG SIZE A 84096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Power dis

47、sipation capacitance CPDSee 4.4.1c 4 35.0 pF Three-state output leakage current IOZVCC= 6.0 V, VIN= VIHor VILVOUT= VCCor GND 1 0.5 A 2, 3 10.0 A Functional tests See 4.4.1b 7, 8 Propagation delay time, mAn to mYn tPLH, tPHL 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 115.0 ns VCC= 4.5 V 23.0 VCC

48、= 6.0 V 20.0 TC= -55C and +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 170.0 ns VCC= 4.5 V 34.0 VCC= 6.0 V 29.0 Propagation delay time, output enable, mOE to mYn tPZH, tPZL 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 150.0 ns VCC= 4.5 V 30.0 VCC= 6.0 V 26.0 TC= -55C and +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 225.0 ns VCC= 4.5 V 45.0 VCC= 6.0 V 38.0 Propagation delay time, output disable, mOE to mYn tPHZ, tPLZ 3/ TC= +25C CL= 50 pF