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本文(DLA SMD-5962-84099 REV H-2009 MICROCIRCUIT DIGITAL HIGH SPEED CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR MONOLITHIC SILICON.pdf)为本站会员(Iclinic170)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-84099 REV H-2009 MICROCIRCUIT DIGITAL HIGH SPEED CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Inactivate case outline R for new design. Convert to military drawing format. Change drawing CAGE to 67268 87-07-07 M. B. Kelleher C Add vendor cage 27014 to case outline 01RX and 012X. Editorial changes throughout. 88-03-26 M. A. Frye D Add vend

2、or CAGE 18324 to case outlines R, S, and 2. Editorial changes throughout. 88-08-17 M. A. Frye E Add vendor CAGE F8859. Add class V device criteria. Editorial changes throughout. ljs 99-11-04 Raymond Monnin F Correct data limits in paragraph 1.3 and test conditions in Table I. Add case outline X. Add

3、 Table III, delta limits. Editorial changes throughout. ljs 00-07-14 Raymond Monnin G Correct table II. Update boilerplate to MIL-PRF- 38535 requirements. jak 02-01-16 Thomas M. Hess H Add JEDEC Standard 7-A reference in paragraphs 2.2 and 4.4.1c. Update boilerplate paragraphs to the current require

4、ments as specified in MIL-PRF-38535. - jak 09-09-02 Thomas M. Hess The current CAGE CODE is 67268. REV SHEET REV H SHEET 15 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICR

5、OCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, OCTAL, D-TYPE FLIP-FLOP WITH CLEAR, MONOLITHIC AND AGENCIES OF THE DEPARTMENT OF DEFENSE

6、 DRAWING APPROVAL DATE 84-09-24 SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 84099 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E445-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84099 DEFENSE SUPPLY

7、CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead fi

8、nishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84099 01 R A Drawing number Device type C

9、ase outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) For device class V: 5962 - 84099 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA de

10、signator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-)

11、 indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC273 Octal D-type flip-flop with clear 1.2.3 Device class designator. The device class designator is a single letter identifying the produ

12、ct assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-cert

13、ification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

14、 MICROCIRCUIT DRAWING SIZE A 84099 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP

15、1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier X See figure 1 20 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolut

16、e maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp diode current (IIK) 20 mA Output clamp diode current (IOK) 20 mA Continuous output current . 25

17、mA Continuous current through VCCor GND 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended oper

18、ating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1,000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns Minimum removal time, clear to clock (tREM): TC= +25C: VCC= 2.0 V 100

19、 ns VCC= 4.5 V 20 ns VCC= 6.0 V 17 ns TC= -55C, +125C: VCC= 2.0 V 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 25 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherw

20、ise specified, all voltages are referenced to GND. 3/ The limits for the parameters speified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded e

21、xcept for allowable short circuit duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84099 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

22、 OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 Minimum setup time, data to clock (tS): TC= +25C: VCC= 2.0 V 100 ns VCC= 4.5 V 20 ns VCC= 6.0 V 17 ns TC= -55C, +125C: VCC= 2.0 V 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 25 ns Minimum hold time, clock to data (th): TC= +25C: VCC= 2.0 V 3 ns

23、VCC= 4.5 V 3 ns VCC= 6.0 V 3 ns TC= -55C, +125C: VCC= 2.0 V 3 ns VCC= 4.5 V 3 ns VCC= 6.0 V 3 ns Minimum pulse width, clear (tW): TC= +25C: VCC= 2.0 V 80 ns VCC= 4.5 V 16 ns VCC= 6.0 V 14 ns TC= -55C, +125C: VCC= 2.0 V 120 ns VCC= 4.5 V 24 ns VCC= 6.0 V 20 ns Maximum operating frequency (fMAX): TC=

24、+25C: VCC= 2.0 V 6 MHz VCC= 4.5 V 30 MHz VCC= 6.0 V 35 Mhz TC= -55C, +125C: VCC= 2.0 V 4 MHz VCC= 4.5 V 20 MHz VCC= 6.0 V 23 MHz Minimum pulse width, clock (tW): TC= +25C: VCC= 2.0 V 80 ns VCC= 4.5 V 16 ns VCC= 6.0 V 14 ns TC= -55C, +125C: VCC= 2.0 V 120 ns VCC= 4.5 V 24 ns VCC= 6.0 V 20 ns Provided

25、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84099 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards

26、, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated

27、 Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-

28、780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) f

29、orm a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMO

30、S Devices (Copies of these documents are available online at http:/www.eia.org or from the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

31、of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535

32、and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A

33、for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2

34、.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D

35、RAWING SIZE A 84099 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and te

36、st circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified

37、 in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the P

38、IN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA desig

39、nator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“

40、as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requir

41、ements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approve

42、d source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformanc

43、e as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (se

44、e 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requi

45、red documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot

46、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84099 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditio

47、ns 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max High-level output voltage VOH VIN= VIHor VILIOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHor VILIOH= -4.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHor VILIOH= -5.2 mA VCC= 6.0 V 1 5.48 2, 3 5

48、.2 Low-level output voltage VOLVIN= VIHor VILIOL= 20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL= 4.0 mA VCC= 4.5 V 1 0.26 2, 3 0.4 VIN= VIHor VILIOL= 5.2 mA VCC= 6.0 V 1 0.26 2, 3 0.4 High level input voltage VIH2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low-level input voltage VIL2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINTC= +25C, VCC= 2.0 V to 6.0 V See 4.4.1

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