DLA SMD-5962-84136 REV E-2005 MICROCIRCUITS DIGITAL BIPOLAR ADVANCED LOW POWER SCHOTTKY TTL FLIP-FLOP MONOLITHIC SILICON《硅单片双稳多谐振荡器 TTL肖脱基高级小功率双极数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Change VILto 0.7 V. Change tPHL2to 15 ns at TC= +25C. Delete IOHand IOLtests. Delete minimum limits from propagation delay times. Convert to Military Drawing format. 86-11-10 M. A. Frye C Split VILinto temperatures. Add footnotes to table I, mini

2、mum limits, and VOH. Change propagation delays. Change footnote 1/ in 1.3. Editorial changes throughout. Change in table II. Add CAGE 27014 to cases R and 2. 88-05-12 M. A. Frye D Changes in accordance with NOR 5962-R096-92. 92-07-06 Monica L. Poelking E Redraw with changes. Update to current requir

3、ements. Editorial changes throughout. - gap 05-11-17 Raymond Monnin CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Mo

4、nnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUITS, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY TTL, FLIP-FLOP, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 85-05-09 MONOLITHIC SILI

5、CON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 84136 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E067-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218

6、-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the f

7、ollowing example: 84136 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS273 Octal D-type flip-flops with clear 1.2.2 Case

8、 outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or GDIP2-T20 20 Dual-in-line S GDFP2-F20 or GDFP3-F20 20 Flat 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as speci

9、fied in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature -65C to +150C Maximum power dissipation (PD) per flip-flop 1/ 159.5 mW Lead temperature (soldering,

10、10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage (VCC) 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL): VIL=

11、 +125C 0.7 V dc VIL= +25C 0.8 V dc VIL= -55C . 0.8 V dc Case operating temperature range (TC) -55C to +125C Width of clear pulse low (tWCLR) 10 ns minimum Width of clock pulse high or low (tWCLK) . 16.5 ns minimum Data setup time before CLK (tSCLK) 10 ns minimum Clear inactive state setup time befor

12、e CLK (tSCLR) . 15 ns minimum Data hold time after CLK (th) . 0 ns minimum _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

13、DARD MICROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this dra

14、wing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-8

15、83 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http

16、:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

17、this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84136 DEF

18、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built

19、to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying

20、 activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described

21、 herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.

22、2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specifie

23、d on figure 3. 3.2.5 Switching circuit and waveforms. The switching circuit and waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the

24、full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The par

25、t shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be r

26、eplaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.

27、6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as

28、required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquirin

29、g activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

30、CROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min MaxIOH= -0.4 m

31、A 1, 2, 3 2.5 V High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, VIL: 2/ +125C = 0.7 V +25C = 0.8 V -55C = 0.8 V IOH= -1.0 mA 2.4 VIL= 0.7 V 2 0.4 V Low level output voltage VOLVCC= 4.5 V, VIH= 2.0 V, IOL= 12 mA 2/ VIL= 0.8 V 1, 3 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.5 V Hig

32、h level input current IIH1VCC= 5.5 V, VIN= 2.7 V, Unused inputs = 0.0 V 1, 2, 3 20 A IIH2VCC= 5.5 V, VIN= 7.0 V, Unused inputs = 0.0 V 1, 2, 3 0.1 mA Low level input current IILVCC= 5.5 V, VIN= 0.4 V, Unused inputs 4.5 V 1, 2, 3 -0.2 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V, 3/ 1, 2, 3 -20 -112

33、mA Supply current ICCHVCC= 5.5 V, VIN 4.5 V 1,2, 3 20 mA ICCLVCC= 5.5 V, VIN 0.4 V 1, 2, 3 29 Functional tests See 4.3.1c 4/ 7, 8 Maximum clock frequency fMAXVCC= 4.5 V to 5.5 V, CL= 50 pF, 9, 10, 11 30 MHz Propagation delay time, CLR to any Q tPHL1RL= 500 , See figure 4 5/ 9, 10, 11 4 21.5 ns Propa

34、gation delay time, CLK to any Q tPHL29, 10, 11 2 16.5 ns tPLH29, 10, 11 3 16.5 ns 1/ Unused inputs that do not directly control the pin under test must be put 2.5 V or 0.4 V. The inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the ca

35、se where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or the VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely approximates one half of the true sho

36、rt circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output

37、switching. Unused outputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 Cases R and

38、 S FIGURE 1. Terminal connections. Case 2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Inputs Output

39、 CLR CLK D Q L X X L H H H H L L H L X Q0H = High voltage level L = low voltge level X = irrelevant Q0= level of Q before the indicated steady state input conditions were established = transition from low to high FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reprodu

40、ction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes scope and jig capacitance. 2. All input pulses have the following charact

41、eristics: PRR 10 Mhz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Switching circuit and waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC

42、IRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be

43、 in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, C, or D. The test circuit shall be maintained by the manufa

44、cturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) T

45、A= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups

46、(in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 50

47、05) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be a

48、s specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84136 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 4.3.2 Grou