DLA SMD-5962-85015 REV E-2005 MICROCIRCUIT DIGITAL CMOS SERIAL CONTROLLER INTERFACE MONOLITHIC SILICON《硅单片串联控制器接口 高速氧化物半导体数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Delete case X dimensions and use D-10, appendix C of MIL-M38510. Change terminal connections for case 3. Changes to recommended operating conditions, table I, and table II. Convert to military drawing format. Editorial changes throughout. 87-04-1

2、7 N. A. Hauck B Changes in accordance with NOR 5962-R028-96. 96-01-03 Monica L. Poelking C Incorporated revision B and updated boilerplate and editorial changes throughout. Added vendor CAGE CODE 34371. - LTG 00-07-31 Monica L. Poelking D Update boilerplate to MIL-PRF-38535 requirements. LTG 01-05-2

3、4 Thomas M. Hess E Correct marking requirements in 3.5. Update boilerplate in accordance with MIL-PRF-38535 requirements. Editorial changes throughout. - PHN. 05-02-23 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV E C E E C C E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPAR

4、ED BY Greg A. Pitz STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 85-11

5、-08 MICROCIRCUIT, DIGITAL, CMOS, SERIAL CONTROLLER INTERFACE, MONOLITHIC SILICON SIZE A CAGE CODE 67268 85015 AMSC N/A REVISION LEVEL E SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E178-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

6、CUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A

7、. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85015 01 X X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic n

8、umber Frequency Circuit function 01 82C52 16 MHz CMOS monolithic serial controller interface 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line package 3 C

9、QCC1-N28 28 Square chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (referenced to ground) +8.0 V dc Input, output, or I/O voltage applied GND -0.5 V dc to VCC +0.5 V dc Storage temperature range (TSTG)

10、. -65C to +150C Maximum power dissipation (PD): 1 W Lead temperature (soldering, 10 seconds) +260C Maximum junction temperature (TJ) +150C Thermal resistance, junction-to-case (JC): Case X. 18C/W Case 3. 60C/W 1/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc min to +5.

11、5 V dc max Case operating temperature range (TC) . -55C to +125C IX input rise or fall time (tr, tf). tx 2/ Frequency of operation . 16 MHz maximum Operating supply current (ICCOP) (outputs open) 3.0 mA maximum 3/ Read disable (tRHDZ) 0 to 60 ns maximum 4/ _ 1/ When a thermal resistance value is inc

12、luded in MIL-STD-1835, it shall supersede the value stated herein. 2/ tx 1/6 FC or 50 ns, whichever is less. See figure 3. 3/ External clock, f = 2.4576 MHz, VCC = 5.5 V, VIN = VCC or GND. 4/ See figure 4, test condition 2 and figure 3 waveform. Provided by IHSNot for ResaleNo reproduction or networ

13、king permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification,

14、standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specificatio

15、n for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies

16、 of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this

17、 drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accord

18、ance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38

19、535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications sha

20、ll not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer

21、to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative approved by the qualifying activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A an

22、d herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Functional diagram. The functional diagram shall be as specified on figure 2. 3.2.4 Switching waveforms and tes

23、t circuit. The switching waveforms and test circuit shall be as specified on figures 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

24、 E SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test

25、 requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may

26、also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify

27、when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, or as modified in the manufacturers QM plan, the “QD” certification mark shall be used in place of the “Q“ or “QML“ certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be

28、 required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-3853

29、5, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required

30、 for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Pr

31、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Sym

32、bol Test conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max IOH = -2.5 mA, VCC = 4.5 V Except OX 1, 2, 3 3.0 High level output voltage 1/ VOH IOH = -100 A, VCC = 4.5 V For OX, IOH = -1.0 mA 1, 2, 3 VCC-0.4 V Low level output voltage 1/ VOL IOL = +2.5 mA, VCC =

33、4.5 V For OX, IOL = +1.0 mA 1, 2, 3 0.4 V High level input voltage VIH VCC = 5.5 V 1, 2, 3 0.7VCC V Low level input voltage VIL VCC = 4.5 V 1, 2, 3 0.4 V VIN = 0.0 V 1, 2, 3 -1.0 Input leakage current (Except for IX) IIN VCC = 5.5 V VIN = VCC 1, 2, 3 1.0 A VIN = 0.0 V 1, 2, 3 -10 Output leakage curr

34、ent IOUT VCC = 5.5 V VIN = VCC 10 A Schmitt trigger logical one input voltage VTH Reset input, VCC = 5.5 V 1, 2, 3 VCC-0.5 V Schmitt trigger logical zero input voltage VTL Reset input, VCC = 4.5 V 1, 2, 3 GND+0.5 V Logical one clock input voltage VIH (CLK) External clock, VCC = 5.5 V 1, 2, 3 VCC-0.5

35、 V Logical zero clock input voltage VIL (CLK) External clock, VCC = 4.5 V 1, 2, 3 GND+0.5 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUM

36、BUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 2/ -55C TC +125C VCC = 4.5 V and 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max Input capacitance CIN 4 12 pF Output ca

37、pacitance COUT 4 15 pF I/O capacitance CI/O Frequency = 1MHz TC = +25C See 4.3.1c All measurements are referenced to device ground 4 15 pF Functional tests See 4.3.1d 2/ VCC = 4.5 V and 5.5 V 7, 8 Select setup to control leading edge tSVCTL 9, 10, 11 30 ns Select hold from control trailing edge tCTH

38、SX 9, 10, 11 50 ns Control pulse width tCTLCTH Control consists of RD or WR 9, 10, 11 150 ns Control disable to control enable tCTHCTL 9, 10, 11 190 ns Read low to data valid tRLDV Test condition 1 9, 10, 11 120 ns Data setup time tDVWH 9, 10, 11 50 ns Data hold time tWHDX 9, 10, 11 20 ns Clock freq

39、uency 3/ FC 9, 10, 11 0 16 MHz Clock high time tCHCL 9, 10, 11 25 ns Clock low time tCLCH 9, 10, 11 25 ns Clock output fall time tFCO Measured from 0.7 VCC to 0.8 V 9, 10, 11 15 ns Clock output rise time tRCO Measured from 0.8 V to 0.7 VCC 9, 10, 11 15 ns 1/ Interchanging of force and sense conditio

40、ns is permitted. 2/ Tested as follows: f = 1 MHz, VIH = 0.7 VCC, VIL = 0.4 V, CL = 50 pF unless a test condition is specified, VIH(CLK) = VCC-0.5 V, VIL(CLK) = GND + 0.5 V, VTH = VCC 0.5 V, VTL = GND + 0.5 V, VOH 1.5 V, and VOL 1.5 V. See figures 3. 3/ FC is calculated on measured tCHCL and tCLCH ti

41、mes. tCHCL and tCLCH must be 62.5 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Ca

42、se outlines X and 3 Terminal number Terminal symbol Terminal number Terminal symbol 1 RD 15 SDO 2 WR 16 GND 3 D0 17 CTS 4 D1 18 DSR 5 D2 19 DTR 6 D3 20 RTS 7 D4 21 CO 8 D5 22 TBRE 9 D6 23 RST 10 D7 24 INTR 11 A0 25 SDI 12 A1 26 DR 13 IX 27 VCC 14 OX 28 CSO FIGURE 1. Terminal connections. FIGURE 2. F

43、unctional diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 TEST CONDITION V1 R1 R2 CL 1 Propaga

44、tion delay 1.7 V 520 100 pF 2 Disable delay VCC 5K 5K 50 pF NOTE: AC testing: All input signals (other than CLK or RESET) must switch between 0.4 V and 0.7 VCC. Input rise and fall times are driven at 1.0 ns/V. FIGURE 3. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduct

45、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85015 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in acco

46、rdance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test

47、condition A, B, C, or D . The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable,

48、in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - Final electrical test parameters (method 5004) 1/ 1, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method