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本文(DLA SMD-5962-85097 REV F-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL MULTIPLEXERS MONOLITHIC SILICON《硅单块 多路复用器高级低功率肖脱基晶体管-晶体管逻辑电路 双极数字微型电路》.pdf)为本站会员(sumcourage256)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-85097 REV F-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL MULTIPLEXERS MONOLITHIC SILICON《硅单块 多路复用器高级低功率肖脱基晶体管-晶体管逻辑电路 双极数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to military drawing format. Add vendor CAGE 01295. Add cases F and 2. Change VIL. Change disable times. 86-08-22 M. A. Frye B Split VILinto temperatures. Add figure 4. Change IILand propagation delay times. Add minimum propagation delay t

2、imes. Add footnotes to table I. Editorial changes throughout. Add VOHtest at IOH= -0.4 mA. Change in test conditions for IILand IIH. Add functional testing to Table I. Change in test conditions for propagation delay times. Change in Table II. Add CAGE 18324. 88-05-12 M. A. Frye C Changes IAW NOR 596

3、2-R087-92. - pn 92-07-07 Monica L. Poelking D Changes IAW NOR 5962-R046-96. - ltg 96-01-25 Monica L. Poelking E Update to reflect latest changes in format and requirements. Editorial changes throughout. - les 01-12-06 Raymond Monnin F Change 3.5 marking paragraph to remove “5962-“. Update boilerplat

4、e to MIL-PRF-38535 requirements. - CFS 05-08-17 Thomas M. Hess Current CAGE code is 67268 The original first sheet of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE

5、SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY, TTL, MULTIPLEXERS, AND AGENCIES OF

6、 THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-02-20 MONOLITHIC SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 85097 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E474-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

7、 DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.

8、2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85097 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number C

9、ircuit function 01 54ALS257 Quad 1-of-8 data selector/multiplexer with 3-state outputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or GDIP2-T16 16 Dual-in-line F GDFP2-F16 or GDFP3-

10、F16 16 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.5 V dc at -18 mA to +7.0 V dc Voltage applied to a disab

11、led 3-state output 5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) per device 77 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply

12、voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH). 2.0 V dc Maximum low level input voltage (VIL): VIL= +125C 0.7 V dc VIL= +25C 0.8 V dc VIL= -55C . 0.8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined

13、 as VCCx ICC, and must withstand the added PDdue to short circuit test (e.g. IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SH

14、EET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in t

15、he solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPA

16、RTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 70

17、0 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations

18、unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufa

19、cturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. T

20、his QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordan

21、ce with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accor

22、dance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms.

23、 The test circuit and switching waveforms shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4

24、DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requiremen

25、ts shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be mar

26、ked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QM

27、L flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of

28、 supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to thi

29、s drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation

30、. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

31、 F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxHigh level output voltage VOH VCC= 4.5 V, VIH= 2.0 V, VIL: 2/ IOH= -0.4 mA 1, 2, 3 All 2.5 V +125C = 0

32、.7 V +25C = 0.8 V -55C = 0.8 V IOH= -1.0 mA 1, 2, 3 All 2.4 V Low level output voltage VOL IOL= 12 mA, VCC= 4.5 V, VIL= 0.7 V 2 All 0.4 V IH= 2.0 V 2/ VIL= 0.8 V 1, 3 All 0.4 V Input clamp voltage VI C VCC= 4.5 V, IIH= -18 mA 1, 2, 3 All -1.5 V Low level input current IILVCC= 5.5 V, VIN= 0.4 V, Unus

33、ed inputs 4.5 V 1, 2, 3 All -0.1 mA High level input current II H1 VCC= 5.5 V, VIN= 2.7 V, Unused inputs = 0.0 V 1, 2, 3 All 20 A II H2 VCC= 5.5 V, VIN= 7.0 V, Unused inputs = 0.0 V 1, 2, 3 All 100 A Output current IO VCC= 5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 All -20 -112 mA Supply current ICCH VCC= 5.5 V

34、 1, 2, 3 All 8 ICCL 1, 2, 3 All 12 CCZ 1, 2, 3 All 14 mA Off-state output current IOZH VCC= 5.5 V, VOUT = 2.7 V 1, 2, 3 All 20 A IOZL VCC= 5.5 V, VOUT= 0.4 V 1, 2, 3 All -20 A Functional tests See 4.3.1c 4/ 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or netwo

35、rking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C unless

36、otherwise specified Group A subgroups Device type Limits Unit Min MaxPropagation delay time, A, B to Y tPLH1 VCC= 4.5 V to 5.5 V, CL= 50 pF, 9, 10, 11 All 2 12 ns tPHL1 R1 = 500, R2= 500 5/ 9, 10, 11 All 2 13 ns Propagation delay time, A /B to any Y tPLH2 See figure 4 9, 10, 11 All 4 21 ns tPHL2 9,

37、10, 11 All 6 25 ns Output enable time, G to any Y tPZH 9, 10, 11 All 3 16 ns tPZL 9, 10, 11 All 4 18 ns Output disable time, G to any Y tPHZ 9, 10, 11 All 2 10 ns tPLZ 9, 10, 11 All 2 25 ns 1/ Unused inputs that do not directly control the pin under test must be put 2.5 V or 0.4 V. The inputs shall

38、not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or the VIHminimum input. 3/ Th

39、e output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at

40、input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused outputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE

41、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 Device types 01 01 Case outlines E, F 2 Terminal number Terminal symbols 1 A /B NC 2 1A A /B3 1B 1A4 1Y 1B5 2A 1Y6 2B NC 7 2Y 2A8 GND 2B9 3Y 2Y10 3B GND11 3ANC 12 4Y 3Y13 4B3B 14 4A3A 15 G4Y 16 VCCNC 17

42、- - - 4B 18 - - - 4A19 - - - G 20 - - - VCC FIGURE 1. Terminal connections. Inputs Output Output control Select Data G A /B A B Y H X X X Z L L L X L L L H X H L H X L L L H X H H H = High voltage level L = Low voltage level Z = High impedance X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot

43、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or

44、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or network

45、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 1

46、0 MHz, duty cycle = 50 percent, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with int

47、ernal conditions such that the output is high except when disabled by the output control. 5. When measuring propagation delay times of three-state outputs, switch S1 is open. FIGURE 4. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permit

48、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85097 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria s

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