DLA SMD-5962-85527 REV C-2010 MICROCIRCUIT MEMORY DIGITAL BIPOLAR 2K x 8-bit REGISTERED PROM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change output delay values in 1.2.1. Minor changes in table I and on figure 2. Update vendors part numbers. Editorial changes throughout. 87-06-29 N. A. Hauck B Changes in accordance with NOR 5962-R082-96. glg 96-03-22 Michael A. Frye C Update dr

2、awing to current requirements. Editorial changes throughout. ksr. 10-02-08 Charles F. Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED CURRENT CAGE CODE IS 67268 REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED

3、 BY Sandra Rooney DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D.A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, MEMORY, DIGITAL, BIPOLAR, 2K x 8-bit, REGISTERED PROM, MO

4、NOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-11-06 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-85527 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E107-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

5、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-85527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-P

6、RF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-85527 01 L_ A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows

7、: Device type Generic number 1/ Circuit function Propagation Delay 01 27S45 2048 X 8-bit registered PROM with 30 ns programmable INITIALIZE 02 27S45A 2048 X 8-bit bipolar PROM 25 ns programmable INITIALIZE 03 27S47 2048 X 8-bit bipolar PROM 30 ns programmable INITIALIZE 04 27S47A 2048 X 8-bit bipola

8、r PROM 25 ns programmable INITIALIZE 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24, CDFP3-F24 24 flat package L GDIP3-T24, CDIP4-T24 24 dual-in-line package X CQCC1-N32 32 rectang

9、ular chip carrier 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range - -0.5 V dc to +7.0 V dc DC Input voltage range - -0.5 V dc to +5.5 V dc DC voltage applied to outputs- -0.5 V dc t

10、o +5.5 V dc DC input current - -30 mA to +5 mA Storage temperature range - -65C to +150C Maximum power dissipation (PD) 1/ - 1.02 W Lead temperature (soldering, 10 seconds) - +300C Thermal resistance, junction-to-case (JC): 2/ Case outlines K, X, 3, and L - See MIl-STD-1835 Junction temperature (TJ)

11、 DC voltage applied to outputs during programming - 21 V DC current into outputs during programming (maximum duration 1 s) 250 mA 1.4 Recommended operating conditions. Supply voltage (VCC) - +4.5 V dc minimum to +5.5 V dc maximum Minimum high-level Input high voltage (VIH) - 2.0 V dc Maximum low-lev

12、el Input low voltage (VIL) - 0.8 V dc Case operating temperature range (TC) - -55C to +125C 1 Must withstand the added PDdue to short circuit test (e.g., IOS). 2/ Heat sinking is recommended to reduce the junction temperature. Provided by IHSNot for ResaleNo reproduction or networking permitted with

13、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-85527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and

14、 handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTM

15、ENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these docu

16、ments are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein,

17、the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for no

18、n-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in acc

19、ordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of th

20、e device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimension

21、s shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Logic diagram. The logic diagram shall be as specified on figure 2. 3.2.3 Truth table. 3.2.3.1 Unprogrammed devices. Testing to the applicabl

22、e truth table, or alternate testing as specified in 4.3.1c, shall be used for unprogrammed devices for contracts involving no altered item drawing. When testing is required in accordance with 4.3 herein, the devices shall be programmed by the manufacturer prior to test, in a checkerboard pattern (a

23、minimum of 50 percent of total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.2.4 Case outlines.

24、 The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for Re

25、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-85527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/

26、-55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Output high voltage VOHVCC= 4.5 V, IOH= -2.0 mA, 1, 2, 3 All 2.4 V IN= VIHor VILOutput low voltage VOLVCC= 4.5 V, IOL= 16.0 mA, 1, 2, 3 All 0.50 V IN= VIHor VILInput high voltage 2/ 3/ VIH1, 2,

27、3 All 2.0 V Input low voltage 2/ 3/ VIL1, 2, 3 All 0.8 V Input clamp voltage VICVCC= 4.5 V, IIN= -18.0 mA 1, 2, 3 All -1.2 V Input low current IILVCC= 5.5 V, VIN= 0.45 V 1, 2, 3 All -250 A Input high current IIHVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 40 A Output short circuit IOSVCC= 5.5 V, 1, 2, 3 All -

28、20 -90 mA current VOUT= 0 V 4/ Power supply current ICCVCC= 5.5 V, All inputs = GND 1, 2, 3 All 185 mA Output leakage current ICEXVCC= 5.5 V VO= 5.5 V 1, 2, 3 All 40 A VGS1= 2.4 V VO= 0.4 V -40 Input capacitance 3/ CINVIN= 2.0 V, TA= +25C, f = 1 MHz 5/ 4 All 8 pF Output capacitance 3/ COUT4 All 15 p

29、F Address to K high, setup time TAVKH See figure 3 6/ 9, 10, 11 02, 04 45 ns 01, 03 50Address to K high, hold time TKHAX 9, 10, 11 All 0 ns Delay from K high to output valid, for initially active outputs (high or low) TKHQV1 9, 10, 11 02, 04 25 ns 01, 03 30K pulse width (high or low)TKHKL, TKLKH 9,

30、10, 11 All 20 ns GS to K high setup time TGSVKH 9, 10, 11 All 15 ns GS to K high hold time TKHGSX 9, 10, 11 All 5.0 ns Delay from I low to output valid (high or low) 7/ TILQV 9, 10, 11 01 40 ns 02 35 Asynchronous I recovery to K (high) 7/ TIHKH 9, 10, 11 01 25 ns 02 20 See footnotes at end of table.

31、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-85527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics -

32、 Continued. Test Symbol Conditions 1/ -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Delay from I low to output valid (high or low) 7/ TILQV See figure 3 6/ 9, 10, 11 01 40 ns 02 35 Asynchronous I recovery to K (high) 7/ TIHKH 9, 10, 11 01 2

33、5 ns 02 20 Asynchronous I pulse width (low) 7/ TILIH 9, 10, 11 01, 02 30 ns IS to K high setup time 8/ TISVKH 9, 10, 11 03 35 ns 04 30 IS to K high hold time 8/ TKHISX 9, 10, 11 03, 04 0 ns Delay from K high to output valid for initially high-Z outputs TKHQV2 9, 10, 11 01, 03 35 ns 02, 04 30 Delay f

34、rom G low to output valid (high or low) TGLQV 9, 10, 11 01, 03 35 ns 02, 04 30 Delay from K high to output high-Z 9/ TKHQZ 9, 10, 11 01, 03 35 ns 02, 04 30 Delay from G high to output high-Z 9/ TGHQZ 9, 10, 11 01, 03 35 ns 02, 04 30 1/ All voltages given are referenced to the test system ground for

35、ac and functional testing. Voltages given for dc testing are referenced to the microcircuit ground terminal. 2/ These are absolute voltages with respect to device ground pin and include all overshoots due to system or tester noise. Do not attempt to test these values without suitable equipment. 3/ V

36、ILand VIHthreshold levels are guaranteed for 0.8 V and 2.0 V respectively during dc testing. For ac and functional testing VILand VIHlimits of -0.2 V and 4.0 V are implemented to allow for noise margins needed in a high speed, automated test equipment environment, when fast switching of multiple I/O

37、s is encountered. 4/ Only one output should be shorted at a time. Duration of the short circuit should not be more than one second. 5/ These parameters are not 100 percent tested, but are evaluated at initial characterization and after any design or process change which may affect the capacitance. 6

38、/ AC tests are performed with input 10 to 90 percent rise and fall times of 5 ns or less. 7/ Applies only when programmable initialize is in the asynchronous operation mode. 8/ Applies only when programmable initialize is in the synchronous operation mode. 9/ TKHQZ and TGHQZ are measured to the VOH-

39、0.5 V and VOL+0.5 V output levels respectively. All other switching parameters are tested from and to the 1.5 V threshold levels. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-85527 DEFENSE SUPPLY CENTER CO

40、LUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordanc

41、e with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5

42、962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to iden

43、tify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an ap

44、proved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits

45、delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. Defense Supply Center Columbus (DSCC), DSCCs agent, and the acquiring activity retain the option to review the manufacture

46、rs facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing options. Since the PROM is an unprogrammed memory capable of being programmed by either the manufacturer or the user to result in a wide variety of PROM configurations; two processing options are provided for selection, using an altered item drawing. 3.10.1 Unprogrammed PROM delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1 and table II. It is recommended that users