DLA SMD-5962-86009 REV D-2008 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS DUAL BINARY COUNTER MONOLITHIC SILICON《数字单硅片微电路 由高速互补金属氧化物半导体结构组成 带二元二进制计数器》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to Military Drawing format. Add vendor CAGE 27014 for device type 01 87-01-09 N A Hauck B Add case 2 for approved source 27014. Add one approved source 01295 for cases E and 2 87-08-25 N A Hauck C Delete vendor CAGE 18714. Technical and e

2、ditorial changes throughout 91-11-05 M. A. Frye D Update boilerplate to current MIL-PRF-38535 requirements. MAA 08-06-25 Thomas M. Hess REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Jeffery Tunstall DEFENSE SUPPLY CENTER

3、 COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D A Di Cenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N A Hauck AND AGENCIES OF THE DEPARTMENT OF DEFENSE ORIGINAL DRAWING APPROVAL DATE 86-01-29 MICROCIRCUIT, DIGITAL, HIGH-SP

4、EED CMOS, DUAL BINARY COUNTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 86009 SHEET 1 OF 13 DSCC FORM 2234 APR 97 5962-E429-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFEN

5、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Numbe

6、r (PIN). The complete PIN is as shown in the following example: 86009 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC390

7、Dual binary counter with divide by 2 and divide by 5 sections 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrie

8、r 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535,appendix A Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEE

9、T 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input clamp diode current (IIK) 20 mA DC output current (per pin) (IOK).

10、 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . -500 mW 4/ Lead temperature (soldering 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +175C 1.4 Recommended opera

11、ting conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc min. to +6.0 V dc max. Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT). 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC = 2.0 V 0 to 500 ns VCC = 4.5 V 0 to 500

12、 ns VCC = 6.0 V 0 to 400 ns Minimum recovery time, reset (trec): For TC = 25C, VCC = 2.0 V 50 ns VCC = 4.5 V 10 ns VCC = 6.0 V 9 ns For TC = -55C / +125C, VCC = 2.0 V 75 ns VCC = 4.5 V 15 ns VCC = 6.0 V 13 ns Minimum width of clock or reset pulse (tw): For TC = 25C, VCC = 2.0 V 85 ns VCC = 4.5 V 17

13、ns VCC = 6.0 V 14 ns For TC = -55C / +125C, VCC = 2.0 V 130 ns VCC = 4.5 V 26 ns VCC = 6.0 V 22 ns Maximum clock frequency (fmax): For TC = 25C, VCC = 2.0 V 5.4 MHz VCC = 4.5 V 27 MHz VCC = 6.0 V 32 MHz For TC = -55C / +125C, VCC = 2.0 V 3.6 MHz VCC = 4.5 V 18 MHz VCC = 6.0 V 21 MHz 1/ Stresses abov

14、e the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the f

15、ull specified VCCrange and case operating temperature range of -55C to +125C. 4/ For TC = +100C to +125C, derate linearly at 12 mW/C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENTER COLU

16、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified,

17、the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface

18、 Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Do

19、cument Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or c

20、ontract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JESD 7A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.eia.org/ or from the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.

21、) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREME

22、NTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer o

23、r a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) p

24、lan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML

25、flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. Th

26、e terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram(s). The logic diagram(s) shall be as specified on figure 2. 3.2.4 Truth table(s) and counting sequence diagram. The truth table(s) and counting sequence diagram shall be as specified on figure 3. 3.2.5 Switching waveforms.

27、 The switching waveforms shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 AP

28、R 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full (case or ambient) operating temperature range. 3.4 Electrical test requirements. The electrical test requirements s

29、hall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked.

30、 For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to M

31、IL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to

32、be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein.

33、 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.

34、 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction

35、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless oth

36、erwise specified Group A subgroups Limits Unit Min Max VCC= 2.0 V 1.9 VCC= 4.5 V 4.4 VIN= VIHmin. or VIL max. IOH= -20 A VCC= 6.0 V 5.9 VIN= VIHmin. or VIL max. IOH= -4 mA VCC= 4.5 V 3.7 High level output voltage VOHVIN= VIHmin. or VIL max. IOH= -5.2 mA VCC= 6.0 V 1, 2, 3 5.2 V VCC= 2.0 V 0.1 VCC= 4

37、.5 V 0.1 VIN= VIHmin. or VIL max. IOL= +20 A VCC= 6.0 V 0.1 VIN= VIHmin. or VIL max. IOL= +4 mA VCC= 4.5 V 0.4 Low level output voltage VOLVIN= VIHmin. or VIL max. IOL= +5.2 mA VCC= 6.0 V 1, 2, 3 0.4 V VCC= 2.0 V 1.50 VCC= 4.5 V 3.15 High level input voltage VIH2/ VCC= 6.0 V 1, 2, 3 4.2 V VCC= 2.0 V

38、 0.3 VCC= 4.5 V 0.9 Low level input voltage VIL2/ VCC= 6.0 V 1, 2, 3 1.2 V Input leakage current IINVIN= VCCor GND VCC= 6.0 V 1, 2, 3 1.0 A Quiescent supply current ICC VIN= VCCor GND VCC= 6.0 V 1, 2, 3 160 A Input capacitance CINVIN= 0.0 V; See 4.4.1c 4 10 pF Functional test See 4.4.1d 7, 8 9 145 V

39、CC= 2.0 V 10, 11 220 9 29 VCC= 4.5 V 10, 11 44 9 25 Propagation delay time, Clock An to QAn 3/ tPHL1, tPLH1CL= 50 pF See figure 4 VCC= 6.0 V 10, 11 38 ns 9 155 VCC= 2.0 V 10, 11 235 9 31 VCC= 4.5 V 10, 11 47 9 26 Propagation delay time, Clock Bn to QBn 3/ tPHL2, tPLH2CL= 50 pF See figure 4 VCC= 6.0

40、V 10, 11 40 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I.

41、Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max 9 210 VCC= 2.0 V 10, 11 315 9 42 VCC= 4.5 V 10, 11 63 9 36 Propagation delay time, Clock Bn to QCn 3/ tPHL3, tPLH3CL= 50 pF See figure 4 VCC= 6.0

42、 V 10, 11 54 ns 9 155 VCC= 2.0 V 10, 11 235 9 31 VCC= 4.5 V 10, 11 47 9 26 Propagation delay time, Clock An to QDn 3/ tPHL4, tPLH4CL= 50 pF See figure 4 VCC= 6.0 V 10, 11 40 ns 9 165 VCC= 2.0 V 10, 11 250 9 33 VCC= 4.5 V 10, 11 50 9 28 Propagation delay time, RESETn to any Qn 3/ tPHL5CL= 50 pF See f

43、igure 4 VCC= 6.0 V 10, 11 43 ns 9 75 VCC= 2.0 V 10, 11 110 9 15 VCC= 4.5 V 10, 11 22 9 13 Transition time 4/ tTLH, tTHLCL= 50 pF See figure 4 VCC= 6.0 V 10, 11 19 ns 1/ For a power supply of 5.0 V 10% the worst case output voltage (VOHand VOL) occur for HC at 4.5 V. Thus the 4.5 V values should be u

44、sed when design with this supply voltage. Worst case VIH and VILoccur at VCC= 5.5 V and 4.5 V respectively. (The VIH value at 5.5 V is 3.85 V ) The worst case leakage current (IIN, ICCand IOZ) occur for CMOS at the higher voltage, So VCC= 6.0 V values should be used. Power dissipation capacitance (C

45、PD) typically 40 pF, to determine the no load dynamic power consumption, PD= CPD(VCCx VCC) x f + (ICCx VCC), and no load dynamic current consumption, IS= (CPDx VCC x f) + ICC2/ VIH and VILtests are not required if applied as forcing function for VOHand VOL.3/ AC testing at VCC= 2.0 V and VCC= 6.0 V

46、shall be guaranteed, if not tested to the specified parameters. 4/ Transition time (tTLH and tTHL) shall be guaranteed, if not tested to the specified parameters. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86

47、009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENT

48、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 FIGURE 2. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM 2234 APR 97 BIQUINARY COUNT SEQUENCE* BCD COUNT SEQUENCE* Output Output Count QAn QDn Q