DLA SMD-5962-86010 REV D-2011 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS UNBUFFERED HEX INVERTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to Military Drawing format. Add vendor CAGE 27014 for device type 01. 87-01-05 N. A. Hauck B Add vendor CAGE code 01295 to case outlines C and 2. Editorial changes. Change drawing CAGE to 67268 87-07-29 N. A. Hauck C Add the truth table.

2、Add notes in figure 4. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG04-06-18 Thomas M. Hess D Correct the conditions IOHand IOLfor output voltage tests in table I. Editorial changes throughout. - jak 11-03-15 David Corbett REV SHET REV SHET REV STATUS REV D D D

3、D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Jeffery Tunstall DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MIC

4、ROCIRCUIT, DIGITAL, HIGH SPEED CMOS, UNBUFFERED HEX INVERTER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-01-25 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 86010 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E155-11 Provided by IHSNot for ResaleNo reproducti

5、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class le

6、vel B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 86010 01 C A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) id

7、entify the circuit function as follows: Device type Generic number Circuit function 01 54HCU04 Unbuffered hex inverter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 1

8、4 Dual-in-line 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VO

9、UT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current 20 mA DC output current (per pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW 3/ Lead temperature (soldering 10 seconds) . 260C Thermal resistance, junction-to

10、-case (JC): Cases C and 2 . See MIL-STD-1835 Junction temperature (TJ) 175C 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 5

11、00 ns VCC= 6.0 V . 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the Maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ For TC= +100C to +1

12、25C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Gov

13、ernment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFIC

14、ATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard

15、 Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publica

16、tions. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD7-A - Standard for Description of 54/74HCXXXX

17、and 54/74HCTXXXX High-Speed CMOS Devices (Copies of these documents are available online at http:/www.jedec.org/ or by mailing to, JEDEC, 3103 North 10thstreet suite 240-S, Arlington, VA 22201-2107.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the referen

18、ces cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535,

19、 appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as

20、QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit,

21、 or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and

22、physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. Provided by IHSNot for ResaleNo reproduction or

23、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram sha

24、ll be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table

25、I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF

26、-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The complian

27、ce indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of sup

28、ply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of

29、conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3

30、.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by

31、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/

32、-55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 2.0 V 1, 2, 3 All 1.8 V VCC= 4.5 V 4.0 VCC= 6.0 V 5.5 VIN= VCCor GND IOH= -4.0 mA VCC= 4.5 V 3.7 VIN= VCCor GND IOH= -5.2 mA VCC= 6.0 V 5.2 Low level o

33、utput voltage VOLVIN= VIHor VILIOL= +20 A VCC= 2.0 V 1, 2, 3 All 0.2 V VCC= 4.5 V 0.5 VCC= 6.0 V 0.5 VIN= VCCor GND IOL= +4.0 mA VCC= 4.5 V 0.4 VIN= VCCor GND IOL= +5.2 mA VCC= 6.0 V 0.4 High level input voltage 2/ VIHVCC= 2.0 V 1, 2, 3 All 1.7 V VCC= 4.5 V 3.6 VCC= 6.0 V 4.8 Low level input voltage

34、 2/ VILVCC= 2.0 V 1, 2, 3 All 0.3 V VCC= 4.5 V 0.8 VCC= 6.0 V 1.1 Quiescent supply current ICCVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 All 40 A Input leakage current IINVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 All 1.0 A Input capacitance CINVIN= 0.0 V, TC= 25C See 4.3.1c 4 All 15.0 pF Functional tests See 4.3.1

35、d 7 All L H Propagation delay time, input A to output Y tPHL, tPLH3/ TC= 25C CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 All 80 ns VCC= 4.5 V 16 VCC= 6.0 V 14 TC= -55C, +125C CL= 50 pF 10% See figure 4 VCC= 2.0 V 10, 11 All 120 ns VCC= 4.5 V 24 VCC= 6.0 V 20 See footnotes at end of table. Provided by IH

36、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditi

37、ons 1/ -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Transition time tTHL, tTLH4/ TC= 25C CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 All 75 ns VCC= 4.5 V 15 VCC= 6.0 V 13 TC= -55C, +125C CL= 50 pF 10% See figure 4 VCC= 2.0 V 10, 11 All 110 ns VCC= 4.5 V 22 VC

38、C= 6.0 V 19 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst cas

39、e leakage currents (IINand ICC) occur for CMOS at the higher voltage and so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 40 pF, determines the no load dynamic power consumption, PD= CPDVCC2f + ICCVCC, and the no load dynamic current consumption, IS= CPDVCCf + ICC.

40、2/ Tests not required if applied as a forcing function for VOHand VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits. 4/ Transition times, if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction

41、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines C 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12

42、13 14 15 16 17 18 19 20 A1 Y1 A2 Y2 A3 Y3 GND Y4 A4 Y5 A5 Y6 A6 VCC- - - - - - NC A1 Y1 A2 NC Y2 NC A3 Y3 GND NC Y4 A4 Y5 NC A5 NC Y6 A6 VCCNC = No internal connection FIGURE 1. Terminal connections. Each inverter Input A Output Y H L L H FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reprod

43、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without

44、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes test jig and probe capacitance. 2. Input signal from pulse generator: PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand t

45、fshall be measured from 0.1 VCCto 0.9 VCCand from 0.9 VCCto 0.1 VCC, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permit

46、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appen

47、dix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The tes

48、t circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test