DLA SMD-5962-86032 REV J-2011 MICROCIRCUIT DIGITAL HCMOS 32-BIT MICROPROCESSOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Inactive device 01 for new design. Add device 03. Upgrade to full military temperature range. Change drawing CAGE code. Editorial changes throughout. 88-04-15 W. Heckman B Add case outline Y. Editorial changes throughout. 89-09-08 W. Heckman C Ad

2、d device types 02 and 03 for CAGE code 48257. Changed thermal resistance value in section 1.3. Changes to figure 1. Editorial changes throughout. 90-10-07 W. Heckman D Updated drawing to reference MIL-STD-1835. Made changes to table I. Modified figure 1, case outline Y. Editorial changes throughout.

3、 93-03-10 Monica L. Poelking E Changes in accordance with NOR 5962-R222-93. 93-03-10 Monica L. Poelking F Add device 04. Editorial changes throughout. 94-08-05 Monica L. Poelking G Changes in accordance with NOR 5962-R064-99. 99-05-27 Monica L. Poelking H Update boilerplate to MIL-PRF-38535 requirem

4、ents. - CFS 05-05-17 Thomas M. Hess J Add device type 05. PHN 11-08-08 Thomas M. Hess CURRENT CAGE CODE 67268. THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV J J J J J J J J J J J J J J J J J SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 REV STATUS REV J J J J J J

5、 J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Christopher A. Rauch DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY William J. Johnson THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMEN

6、TS APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, HCMOS, 32-BIT MICROPROCESSOR, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-02-25 AMSC N/A REVISION LEVEL SIZE A CAGE CODE 14933 5962-86032 J SHEET 1 OF 31 DSCC FORM 2233 APR 97 5962-E458-11 Provided by

7、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-

8、STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86032 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2

9、.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 68020-12 HCMOS, 32-bit microprocessor 02 68020-16 HCMOS, 32-bit microprocessor 03 68020-20 HCMOS, 32-bit microprocessor 04 68020-25 HCMOS, 32-bit microprocessor 05 68020-33

10、HCMOS, 32-bit microprocessor 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA5-P114 114 Pin grid array Y See figure 1 132 Square leaded chip carrier 1.2.3 Lead finish. The lead finish is

11、as specified in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute max

12、imum ratings. Supply voltage range (VDD) -0.3 V dc to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) . 1.75 W 1/ Lead temperature (soldering, 5 seconds) . +270C Junction temperature (TJ) . +150C Thermal resistance, junction-to-case (JC): Case outline X . See MIL-STD

13、-1835 Case outline Y . 10C 1.4 Recommended operating conditions. Supply voltage range (VDD) 4.5 V minimum to 5.5 V maximum High level input voltage range (VIH) 2.0 V dc to VCCLow level input voltage range (VIL) . GND or -0.5 V dc to +0.8 V dc Minimum high level output voltage (VOH) 2.4 V dc Maximum

14、low level output voltage (VOL) 0.5 V dc Maximum low level output voltage (RESET only). 0.8 V dc Case operating temperature range (TC) . -55C to +125C Frequency of operation: Device type 01 8.0 MHz to 12.5 MHz Device type 02 8.0 MHz to 16.7 MHz Device type 03 12.5 MHz to 20.0 MHz Device type 04 12.5

15、MHz to 25.0 MHz Device type 05 12.5 MHz to 33.33 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these docum

16、ents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Comp

17、onent Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardizatio

18、n Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applica

19、ble laws and regulations unless a specific exemption has been obtained. _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND

20、 MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing th

21、at is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval

22、 in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or

23、“QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s

24、). The case outline(s) shall be in accordance with 1.2.2 herein and as specified on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms

25、 and test circuits. The timing waveforms and test circuits shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature

26、 range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN

27、listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance i

28、ndicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A

29、certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufact

30、urers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change.

31、 Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable require

32、d documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV

33、ISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 4.5 V VCC 5.5 V -55C TC+125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max Output high voltage, A0-A31, AS, BG, D0-D31, DBEN, DS, ECS, R/W, IPEND, OCS,

34、 RMC, SIZ0-SIZ1, FC0-FC2 VOHIOH= -400 A 1, 2, 3 All 2.4 V Output low voltage, A0-A31, FC0-FC2, SIZ0-SIZ1, BG, D0-D31 VOL1IOL= 3.2 mA 1, 2, 3 All 0.5 V Output low voltage, AS, DS, R/W, RMC, DBEN, IPEND VOL2IOL= 5.3 mA 1, 2, 3 All 0.5 V Output low voltage, ECS, OCS VOL3IOL= 2.0 mA 1, 2, 3 All 0.5 V Ou

35、tput low voltage, HALT VOL4IOL= 10.7 mA 1, 2, 3 All 0.5 V Output low voltage, RESET VOL5IOL= 10.7 mA 1, 2, 3 All 0.8 V Input high voltage VIH1, 2, 3 All 2.0 VCCV Input low voltage VIL1, 2, 3 All GND 0.5 0.8 V Input leakage current, BERR, BR, BGACK, CLK, IPL0-IPL2, AVEC, CDIS, DSACK0, DSACK1 IIN1VSS

36、VIN VCC1, 2, 3 All -1.0 1.0 A Input leakage current, HALT, RESET IIN2VSS VIN VCC1, 2, 3 All -2.5 2.5 A HI-Z (off-state) leakage current, A0-A31, AS, DBEN, DS, D0-D31, FC0-FC2, R/W, RMC, SIZ0-SIZ1 ITSI2.4 V or 0.5 V 1, 2, 3 All -2.5 2.5 A Supply current 2/ ICCVCC= 5.5 V 1, 3 All 333 mA 2 220Input cap

37、acitance CINVIN= 0 V, TC= +25C, fIN= 1 MHz See 4.3.1c 4 All 20.0 pF Functional tests See 4.3.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND MARIT

38、IME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 4.5 V VCC 5.5 V -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Frequency of operation f VCC=

39、4.5 V 3/ 4/ 9, 10, 11 01 8 12.5 MHz 02 8 16.7 03 12.5 20.0 04 12.5 25.0 05 12.5 33.33 Cycle time tCYCReference number 1. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 80 125 ns 02 60 125 03 50 80 04 40 80 05 30 80 Clock pulse width tCL, tCHReference number 2 and 3. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 32 87 ns 02 24

40、 95 03 20 54 04 19 61 05 14 66 Clock rise and fall times tCR, tCFReference number 4 and 5. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01-03 5 ns 04 4 05 3 Clock high to ADDRESS/ FC/SIZE/RMC valid tCHAVReference number 6. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 0 40 ns 02 0 30 03-04 0 25 05 0 21 Clock high to ECS, OCS a

41、sserted tCHEVReference number 6a. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 0 30 ns 02 0 20 03 0 15 04 0 12 05 0 10 Clock high to ADDRESS, DATA, FC, RMC, SIZE, HI-Z tCHAZxReference number 7. VCC= 4.5 V 3/ 4/ 5/ 6/ 9, 10, 11 01 0 80 ns 02 0 60 03 0 50 04 0 40 05 0 30 Clock high to ADDRESS/ FC/SIZE/RMC invalid

42、 tCHAZnReference number 8. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 All 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION

43、LEVEL J SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 4.5 V VCC 5.5 V -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Clock low to AS, DS asserted tCLSAReference number 9. VCC= 4.5 V 3/ 4

44、/ 5/ 9, 10, 11 01 3 40 ns 02 3 30 03 3 25 04 3 18 05 3 15 AS to DS assertion (READ) (SKEW) tSTSAReference number 9a. VCC= 4.5 V 3/ 4/ 5/ 7/ 9, 10, 11 01 -20 20 ns 02 -15 15 03-05 -10 10 AS asserted to DS asserted (WRITE) tSASAReference number 9b. VCC= 4.5 V 3/ 4/ 5/ 8/ 9, 10, 11 01 42 ns 02 37 03 32

45、 04 27 05 22 ECS width asserted tECSAReference number 10. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 25 ns 02 20 03-04 15 05 10 OCS width asserted tOCSAReference number 10a. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 25 ns 02 20 03-04 15 05 10 ECS, OCS width negated tCWNReference number 10b. VCC= 4.5 V 3/ 4/ 5/ 6/ 9/ 9

46、, 10, 11 01 20 ns 02 15 03 10 04 5 05 5 ADDRESS/FC/SIZE/ RMC valid to AS (and DS asserted READ) tAVSAReference number 11. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 20 ns 02 15 03 10 04 6 05 5 Clock low to AS, DS negated tCLSNReference number 12. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 0 40 ns 02 0 30 03 0 25 04 0 1

47、5 05 0 15 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86032 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrica

48、l performance characteristics - Continued. Test Symbol Conditions 1/ 4.5 V VCC 5.5 V -55C TC+125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max Clock low to ECS, OCS negated tCLENReference number 12a. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 0 40 ns 02 0 30 03 0 25 04 0 15 05 0 15 AS, DS negated to ADDRESS, FC, SIZE, RMC invalid tSNAIReference number 13. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 20 ns 02 15 03-04 10 05 5 AS (and DS READ) width asserted tSWAReference number 14. VCC= 4.5 V 3/ 4/ 5/ 9, 10, 11 01 120 ns 02 100 03 85 04 70 0