DLA SMD-5962-86719 REV A-2007 MICROCIRCUIT DIGITAL LOW POWER SCHOTTKY TTL QUAD D-TYPE REGISTER MONOLITHIC SILICON《硅单块 D型自动记录机器低功率肖特基晶体管-晶体管逻辑电路数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 07-04-10 Robert M Heber CURRENT CAGE CODE IS 67268 The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF S

2、HEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Charles Reusing MICROCIRCU

3、IT, DIGITAL, LOW POWER SCHOTTKY TTL, QUAD D-TYPE REGISTER AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-10-10 MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 14933 5962-86719 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E153-07 Provided by IHSNot for ResaleNo reproduct

4、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, n

5、on-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86719 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). T

6、he device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 25LS2518 or Quad D-type register with standard and three 29LS18 state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descrip

7、tive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat pack 2 CQCC1-N20 20 leadless square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.

8、5 V dc to +7.0 V dc Input voltage range -1.5 V dc to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ 700 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +150C DC output curr

9、ents, into outputs 30 mA DC input current . -30 mA to +5.0 mA _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER

10、 COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high-level input voltage (VIH) . 2.0 V dc Maximum low-level input voltage (VIL) 0.7 V dc Case operating tempera

11、ture range (TC) . -55C to +125C Clock pulse width high: VCC= 5.0 V, TC= +25C . 15 ns minimum VCC= 4.5 V to 5.5 V, TC= -55C/+125C 20 ns minimum Clock pulse width low: VCC= 5.0 V, TC= +25C . 18 ns minimum VCC= 4.5 V to 5.5 V, TC= -55C/+125C 20 ns minimum Data setup time: VCC= 5.0 V, TC= +25C . 15 ns m

12、inimum VCC= 4.5 V to 5.5 V, TC= -55C/+125C 15 ns minimum Data hold time: VCC= 5.0 V, TC= +25C . 5 ns minimum VCC= 4.5 V to 5.5 V, TC= -55C/+125C 5 ns minimum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a p

13、art of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STAN

14、DARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available

15、 online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited

16、 herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA

17、WING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specif

18、ied herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved p

19、rogram plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not a

20、ffect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535,

21、 appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram

22、shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical te

23、st requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN ma

24、y also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built i

25、n compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufact

26、urer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the req

27、uirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affe

28、cts this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for Resa

29、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C

30、TC +125C Group A Limits Unit unless otherwise specified subgroups Min Max High level output voltage VOHVCC= 4.5 V VIN= 0.7 V or 2.0 V Q, IOH= -660 A 1, 2, 3 2.5 V Y, IOH= -1.0 mA 1, 2, 3 2.4 Low level output voltage VOLVCC= 4.5 V VIN= 0.7 V or 2.0 V IOL= 4.0 mA 1, 2, 3 0.4 V IOL= 8.0 mA 1, 2, 3 0.45

31、 IOL= 12.0 mA 1, 2, 3 0.5 Input clamp voltage VICIIN= -18 mA 1, 2, 3 -1.5 V VCC= 4.5 V High level input current IIH1VCC= 5.5 V 1, 2, 3 20 A VIN= 2.7 V IIH2VCC= 5.5 V 1, 2, 3 100 A IN= 7.0 V Low level input current IILVCC= 5.5 V 1, 2, 3 -0.36 mA VIN= 0.4 V Short circuit output current IOSVCC= 5.5 V 1

32、, 2, 3 -15 -85 mA VOUT= 0.0 V 1/ Supply current ICCVCC= 4.5 V, Inputs = 4.5 V 1, 2, 3 28 mA Outputs open Off-state output current IOZHVCC= 5.5 V 1, 2, 3 20 A VOUT= 2.4 V IOZLVCC= 5.5 V 1, 2, 3 -20 A OUT= 0.4 V Propagation delay tPLH1CL= 15 pF 2/ 9 27 ns RL= 2 k from CP to QiCL= 50 pF 3/ 9, 10, 11 45

33、 RL= 2 k tPHL1CL= 15 pF 2/ 9 27 ns RL= 2 k CL= 50 pF 3/ 9, 10, 11 45 RL= 2 k See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

34、43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Propagation delay tPLH2CL= 15 pF 2/ 9 27 ns RL1= 5 k, RL2= 2 k from CP to YiCL=

35、 50 pF 3/ 9, 10, 11 40 RL1= 5 k, RL2= 2 k tPHL2CL= 15 pF 2/ 9 27 ns RL1= 5 k, RL2= 2 k CL= 50 pF 3/ 9, 10, 11 40 RL1= 5 k, RL2= 2 k Propagation delay tPZHCL= 15 pF 2/ 9 15 ns RL1= 5 k, RL2= 2 k from OE to YiCL= 50 pF 3/ 9, 10, 11 20 RL1= 5 k, RL2= 2 k tPZLCL= 15 pF 2/ 9 15 ns RL1= 5 k, RL2= 2 k CL=

36、50 pF 3/ 9, 10, 11 20 RL1= 5 k, RL2= 2 k Propagation delay tPHZCL= 5 pF 2/ 9 15 ns RL1= 5 k, RL2= 2 k from OE to Yi3/ 9, 10, 11 20 tPLZ2/ 9 15 ns 3/ 9, 10, 11 20 1/ Not more than one output should be shorted at a time, and the duration of the short circuit condition should not exceed one second. 2/

37、VCC= 5.0 V. 3/ VCC= 4.5 V to 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01

38、 Case outlines E and F 2 Terminal number Terminal symbol 1 D0 D0 2 Q0 Q0 3 Y0 NC 4 D1 Y0 5 Q1 D1 6 Y1 Q1 7 OE Y1 8 GND NC 9 CP OE 10 Y2 GND 11 Q2 CP 12 D2 Y2 13 Y3 NC 14 Q3 Q2 15 D3 D2 16 VCCY3 17 Q3 18 NC 19 D3 20 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or ne

39、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs OE Clock CP D Q Y Notes H L X NC Z H H X NC Z H L L Z H H H Z L L L L L H H H L L L 1

40、 L H H 1 L = LOW NC = No change H = HIGH = LOW to HIGH transition X = Dont care Z = High impedance NOTE: 1. When OE is LOW, the Y output will be in the same logic state as the Q output. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

41、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC

42、UIT DRAWING SIZE A 5962-86719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall

43、 be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the

44、manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.

45、 (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subg

46、roups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10*, 11* Groups C and D end-point electrical parameters (method 50

47、05) 1, 2, 3 * PDA applies to subgroup 1. * Subgroup 10 and 11, if not tested, shall be guaranteed to the limits specified in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c.