DLA SMD-5962-86724 REV B-2007 MICROCIRCUIT DIGITAL BIPOLAR OCTAL BUFFERS MONOLITHIC SILICON《硅单块 八进制缓冲器双极数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change drawing code indent. no. to 67268. Page 4, overline V G1 = V G2 = 0.8 V where applicable. Page 5, overline G1 = 0.0 V and G2 = 0.0 V where applicable. Editorial changes. 87-09-15 N. A. Hauck B Update drawing to current requirements. Editor

2、ial changes throughout. - gap 07-04-10 Robert M. Heber CURRENT CAGE CODE IS 67268 The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Monica Grosel DEFENSE SUPPLY CENTER COLUMB

3、US STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, BIPOLAR, OCTAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-04-01 BUFFE

4、RS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 14933 5962-86724 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E154-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER

5、COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The comp

6、lete PIN is as shown in the following example: 5962-86724 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 25S240 Octal inverti

7、ng three-state buffers 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat package 1.2.3 Lead finish. The lead fini

8、sh is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc to 7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ 2.1 W Lead temperature (soldering, 10 seconds) . +300C Ther

9、mal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +150C DC input current . -30 mA to +5.0 mA DC output current into output . +30 mA 1.4 Recommended operating conditions. Supply voltage (VCC) . +4.5 V dc to +5.5 V dc maximum Minimum high-level input voltage (VIH) .

10、2.0 V dc Maximum low-level input voltage (VIL) 0.8 V dc Ambient operating temperature range (TA) . -55C to 125C _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI

11、T DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the

12、 extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test M

13、ethod Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.da

14、ps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

15、drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level

16、 B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the

17、manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These m

18、odifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as spe

19、cified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic d

20、iagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms. The switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and

21、 shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking

22、 permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with th

23、e PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compli

24、ance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of complian

25、ce. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers produc

26、t meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notificatio

27、n of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available o

28、nshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to

29、 quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing o

30、r acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in

31、 table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COL

32、UMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Limits Unit Symbol Condition 1/ -55C TA +125C (unless otherwise specified) Group A subgroups Min Max High level output voltage VCC= +4.5 V, IOH= -3.0 mA, VIN= 0.8 V or

33、 2.0 V V G1 = V G2 = 0.8 V 1, 2, 3 2.4 V VOHVCC= +4.5 V, IOH= -12.0 mA, VIN= 0.8 V or 2.0 V V G1 = V G2 = 0.5 V 1, 2, 3 2.0 V Low-level output voltage VOLVCC= 4.5 V, IOL= 48.0 mA, VIN= 0.8 V or 2.0 V 1, 2, 3 0.55 V Hysteresis (VT+ - VT-) VhystVCC= +4.5 V 1, 2, 3 0.2 V Input clamp voltage VICVCC= 4.5

34、 V, IIN= -18 mA 1, 2, 3 -1.2 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 50 A IIH2VCC= +5.5 V, VIN= 5.5 V 1, 2, 3 1.0 mA Low level input current Any A -0.4 IILVCC= +5.5 V, VIN= 0.5 V Any G 1, 2, 3 -2.0 mA Output short circuit current IOSVCC= +5.5 V, VOUT= 0 V 1/ 1, 2, 3 -50 -225 mA

35、 Off-state current IOZHVCC= +5.5 V, VOUT= 2.4 V 1, 2, 3 50 A IOZLVCC= +5.5 V, VOUT= 0.5 V 1, 2, 3 -50 A VCC= + 5.5 V All outputs open, G1 = 0.0 V, G2 = 0.0 V, Data = 0.0 V 1, 2, 3 65 mA VCC= + 5.5 V All outputs low, G1 = 0.0 V, G2 = 0.0 V, Data = 3.0 V 1, 2, 3 90 mA Supply current ICCVCC= + 5.5 V Al

36、l outputs HI-Z, G1 = 3.0 V, G2 = 3.0 V, Data = 0.0 V 1, 2, 3 105 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

37、0 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Condition 1/ -55C TA +125C (unless otherwise specified) Group A subgroups Min Max Unit Functional testing See 4.3.1c 7, 8 2/ 9 7 tPLH3/ 9, 10, 11 9 ns 2/ 9 7 Propagation d

38、elay from A1 to Y1 tPHL3/ 9, 10, 11 9 ns 2/ 9 10 tPZH3/ 9, 10, 11 13 ns 2/ 9 15 Propagation delay from output enable to Y1 tPZLCL= 50 pF, RL1= 1 k, RL2= 90 3/ 9, 10, 11 18 ns CL= 50 pF 2/ 9 18 tPHZ1CL= 5 pF 3/ 9, 10, 11 12 ns CL= 50 pF 2/ 9 18 Propagation delay from output enable to Y1 tPLZ1RL1= 1 k

39、, RL2= 90 CL= 5 pF 3/ 9, 10, 11 18 ns tPHZ29 9 ns Propagation delay from output enable to Y1 tPLZ2CL= 5 pF, RL1= 1 k, RL2= 90 2/ 9 15 ns 1/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not exceed one second. 2/ VCC= 5.0 V. 3/ VCC= 4.5 V

40、to 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Inputs O

41、utputs G A Y H X Z L H L L L H FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B S

42、HEET 8 DSCC FORM 2234 APR 97 Switch matrix Parameter SW1SW2tPLHClosed Closed tPHLClosed Closed tZLOpen Closed tZHClosed Open tLZClosed Closed tHZClosed Closed FIGURE 4. Switching waveforms Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICR

43、OCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. Pulse generator for all pulses: Rate 1.0 MHz; Z0= 50 ohm; tr 15 ns; tf 6.0 ns. 2. CLincludes probe and jig capacitance. 3. All diodes are IN916 or IN30

44、64. FIGURE 4. Switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86724 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 TA

45、BLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2

46、, 3, 7, 8, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the limits specified in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accord

47、ance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups

48、 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit