DLA SMD-5962-86810 REV A-1988 MICROCIRCUITS DIGITAL NMOS DUAL UNIVERSAL SERIAL COMMUNICATIONS CONTROLLER MONOLITHIC SILICON《硅单块 N沟道金属氧化物半导体 双万能系列交流控制器数字微型电路》.pdf

1、I DESC-DWG-BbLO REV A 57 W 7777775 O006660 O - i? - i d sa-33 PMIC WA STAN DARD I Z ED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPAKIMENTS AND AGENCIES OF THE DEPAThlENT OF DEFENSE AMSC NIA DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SHEET . 1 1 *US. GoMRHMfHT PAIHTIffi WF

2、KI: 1967 - 748-11916091 1 )ESC FORM 193 SEP 87 DISTRIBUTION STATEMENT A. . Approved for public release; distribution is unlimited. -7 /f- 6? A- - 5962-El 137 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DES-DWG-dbiO REV A 59 = 9995 000bbbL 2 W t ?

3、 SIZE A STANDARDIZED 1. SCOPE 5962-86810 1,l Scope, This drawing describes device requirements for class B microcircui ts in accordance with 1,2.if MIL-STO-883, “Provisions for the use of MIL-STD-883 in conjunction with compl fant non-JAN devices“, 1.2 Part number. The complete part number shall be

4、as shown in the following example: T- X -I- ! X 7- 1 I I I I Drawing nunber Devi ce type Case outline Lead finish per (1.2.1) (1.2.21 MIL-M-38510 1.2.1 Device type, The device type shall identify the circuit function as follows: Device type 01 Generic number 68562 Circuit function Dual universal ser

5、ial cornunications control 1 er ( DUSCC 1,2,2 Case outline. The case outline shall be as designated in appendix C of MIL-M-38510, and 3s follows: ou tl i ne 1 etter Case outline X D-14 (48-lead, 2,435“ x ,620“ x .225“), dual-in-line package 1,3 Absol Ute maximum ratings, Storage temperature - - - -

6、- - - - - - - - - - -65C to +150C All voltages with respect to ground - - - - - - -0,5 V dc to 7.0 V dc Maximum power dissipation (PD) - - - - - - - - - 1.8 Lead temperature (soldering, 10 seconds) - - - - e300 C Junction temperature - - - - - - - - - - - - - - +175C Thema1 resistance, junctlon-to-c

7、ase ( OJC) - - - See MIL-M-38510, append1 x C 1.4 Recomnended operating conditions, Sup ly voltage (VCC) - - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc 2.0 v All except Xl/CLK- - - - - - - - - - - - - - - Xl/CLK - - - - - - - - - - - - - - - - - - - - 2,4V All except Xl/CLK - - - - - - - - - - - -

8、 - - 0.8 V Xl/CLK - I - I - - - - - - - - - - - - - - - 0.4 V All except DONEN and IRQN- - - - - - - - - - - 5.3 mA DONEN and IRQN - - - - - - - - - - - - - - - - 8.8 m4 Case operating temperature range (TC)- - - - - - -55 C to +llOC Hig R level input voltage (VIH): Low level input voltage (VIL): Lo

9、w level output current (10): High level output current (10)- - - - - - - - - -409 UA DAYTON, OHIO 45444 I I A 2 (i u. s. GOVERNMENT wNnm OFFICE: IS+-MT DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- J I DESC-DWG-BbBLO REV A 57

10、 7777775 000bbb2 4 W - 2. APPLICABLE DOCUMENTS 2.1 Government specification and standard. Unless otherwise specified, the following ;pecification and standard, of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a p

11、art of this drawing to the ?xtent specified herein. SPECIFICATION MILITARY MI L-M- 38510 - Microcircuits, General Specification for. STANDARD MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. (Copies of the specification and standard required by manufacturers in connection wit

12、h specific icquisition functions should be obtained from the contracting activity or as directed by the :ontracting activity. *eferences citedPherein, the text of this drawing shall take precedence. 2.2 Order of recedence. 3. REQUIREMENTS , 3.1 Item requirements. The individual item requirements sha

13、ll be in accordance with 1.2.1 of IIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“ ind as specified herein. In the event of a conflict between the text of this drawing and the 3.2 Design, construction, and physical dimensions. The design, constructio

14、n, and physical iimensions shai I be as specltied in MIL-M-3B510 and herein . 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1 . 3.2.2 Logic diagram. 3.2.3 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.3 Electrical performance charac

15、teristics. Unless otherwise specified, the electrical The logic diagram shall be as specified on figure 2. )erformanCe characteristics are as specified in table I and apply over the full case operating :emperatwe range. 3.4 Marking. Marking shall be in accordance with MIL-STD-883 (see 3.1 herein). T

16、he part shall be larked with the part number listed in 1.2 herein. ils0 be marked as listed in 6.5 herein. in order to be listed as an approved source of supply in 6.5. ;ubmitted to DESC-ECS prior to listing as an approved source of supply shall state that the ianufacturer s product meets the requir

17、ements of MIL-STD-883 (see 3.1 herein) and the requirements ierei n. In addition, the manufacturers part number may 3.5 Certificate of compliance. A certificate of compliance shall be required from a manufacturer The certificate of compliance 3.6 Certificate of conformance. A certificate of conforma

18、nce as required in MIL-STD-883 (see 3.1 ierein) shall be provided with each lot of microcircuits delivered to this drawing. 5962-86810 STANDARDIZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 3 DAYTON, OH0 45444 n I I U.S. GOVERNMENT PRINTING OFFICE: 1987-549496 ES

19、C FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-, STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTE AlN, OHIO 45444 TABLE I. Electrical performance characteristics, SIZE A 5962-86810 RMSION LEVEL SHEET A 4 I I I symbO1

20、 I Icc Test Power supply current -r Output low voltage, except I VOL DONEN and IRQN I Output voltage low 1 VOL DONEN and IRQN I I Output high voltage VOH I Conditions -55C -547 IESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DES

21、C-DWG-86810 REV A 57 m 7777775 000bbb8 5 m I- STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 TABLE I. Electrical performance characteristics - Continued. Conditions 1 2/ IGroup A I Limits I Unit Test lSyd101 I -55C I I -r 8 I v) VI O) 7 -Cu Idu c v) II STANDARDIZE

22、D SIZE I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-i BIT TIME 7 (1 OR 16 7 (I TxC NPUT) L L - TxC (1X OUTPUT) FIGURE 11. Transmit timing. SYNOUT L SYNIN RxC CLXI INPUT L RxD * FIGURE 12. Recieve timing. I ACKN -8- I DCN FIGURE 13. Interrupt dai

23、sy chain timing, STANDARDIZED MILITARY DRAWING Iq I 5962-8681 O I RMSIONCEVEL I SHEET I 16 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON. OHIO 45444 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-6810 REV A 57 m 7777775 000bb7b 4 m *r STANDARDIZ

24、ED MILITARY DRAWING DEFENSE ELECTRONICC SUPPLY CENTER DAMON, OHIO 45444 8 1 15 a c? I- SIZE A 5962-8681 O REVISION LEVU. SHEET 17 L T I v) v) al L U U 5 al Y .I- ! .I- .I- E c al c, L .I- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-f I STANDARDIZ

25、ED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 I z size A 5962-8681 O , REVISION LEVEL SHEET 18 A Lt- T z 0 I- n x Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I. DESC-DWG-86810 REV A 57 m 7777775 O006678 8 m 1 ff -u DONE

26、N (OUTPUT) STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 CSN SIZE A 5962-8681 O REVISION LEVEL SHEET 19 DTACKN DONEN (INPUT) TxDRQN I TRANSMIT DUAL ADDRESS OMA MODE - DONEN COUTPUTI C EOM 1 i RTxDRQN FIGURE 16. Dual address DMA mode timing. Provided by IHSNot for

27、 ResaleNo reproduction or networking permitted without license from IHS-,-,-3.7 Notification OP change, Notification of change to DESC-ECS shall be required in accordance with MIL-STD-883 ( see 3.1 herein). 3.8 Verification and review. DESC, DESCs agent, and the acquirin activity retain the option t

28、o revieu -i ty and applicable required documentat 9 on. Offshore documentation shall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be f n accordance with 4,2 Screenin , Screenin shall be

29、in accordance with method 5004 of MIL-STD-883, and shall be Section 4 of MIL - M 38310 t o tXe extent specified in MIL-STD-883 (see 3.1 herein), conduct4 devices pr 9 or to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883, (1)

30、 Test condition A or D using the circuit submitted with the certificate of compliance (see 3.5 herein). (2) TA +125C, minimum. b, Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the disc

31、retion of the manufacturer. 4.3 Quality conformance f nspection, Quality conformance inspection shall be in accordance wfth nethod 5005 Of MIL 4iTD-883 including groups A, 8, C, and D inspections. The following additional :riteria shall apply. 43.1 Group A inspection. a. Tests shall be as-specified

32、in table II herein, b, Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall consist of verifying the functionality of the device, These tests form a part of the vendors test tape and shall be maintafned and available from the approved sources of s

33、upply. 4.3.2 Groups C and D inspections. a, End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (i) Test condition A or D using the circuit submitted with the certificate of compliance (see 3.5 herein), (2) TA +1

34、25“C, minimum, (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARDIZED SIZE A 5962-86810 MILITARY DRAWING DEFENSE ELECTAONICS SUPPLY CENTER RMSION LRIEi SHEET DAMON, OHIO 45444 A 20 ESC FORM 193A SEP 87 (i U. S. OOVERNMENT PWNTINO OFFGE: 19-550-547 Provided by

35、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- DESC-DWG-BbLO REV A 57 m 7777775 OOObbO b m TT * TABLE I I. El ectrical test requi rements. I I Subgroups i I MIL-STD-883 test requirements I (per method I I I 5005, table I) I I 1. - i/ I I I I I I I 1 I I Inter

36、im electrical parameters I I (method 5004) I I I Final electrical test parametersi 1*,2,3,7,8,9, I (method 5004) I 10,ll I I I I i I I I Group A test requirements i 1,2,3,7,8,9, i I (method 5005) l 10,ll I * PDA applies to subgroup 1. i/ Any subgroup at the same temperature may be combined using a m

37、u1 ti function tester. - 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with IL -M-385 10. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use when military iecifications do not exist and qualified military devices

38、that will perform the required function re not available for OEM application. When a military specification exists and the product covered I this drawing has been qualified for listing on QPL-38510, the device specified herein will be iactivated and will not be used for new design. The QPL-38510 pro

39、duct shall be the preferred item )r all applications. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device )vered by a contractor-prepared specification or drawing. 5962-86810 STANDARDIZED SIZE MILITARY DRAWING A SHEET 21 DEFENSE ELECTRONICS SUPPLY CEHER DAM

40、ON, OHIO 45444 RMSION LEVEL h V.S. GOVERNMENT PRINTINQ OFFICE 1987-549098 ;C FORM 193A :P 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- 6.3 Comments, Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or 6.4 Pin descri

41、ptions, ;el epho-96-5375. Mnemonic A6-A1 D7-DOt RhN CSN IRQN IACKN Xl/CLK X2/IDCN Pi n 45-47 2-4 18-21 28-31 - 26 25 6 1 43 42 ly9e I I /u I I O I I I /o Name and function Address lines: Active high, Address inputs which specify which of the internal registers is accessed for read/write operations.

42、Bidirectional data bus: Active high, three-state. Bit O is the LSB and bit 7 is the MSB, All data, command, and status transfers between the CPU and the DUSCC take place over this bus. bus is enabled when CSN is low, during interrupt acknowledge cycles and single address DMA acknowledge cycles. Read

43、/Write: A high input indicates a read cycle and a low input indicates a write cycle when a cycle is initiated by assertion of the CSN input. Chip select: Active low input. When low, data transfers between the CPU and the DUSCC are enabled on DO-D7 as controlled by R/WN and Al-A6 inputs. When CSN is

44、high, the DUSCC is isolated from the data bus (except during interrupt acknowledge cycles and single address DMA transfers) and DO47 are placed in the 3-state condi ti on. Interrupt request: Active low, open drain. This output is asserted upon occurrence of any enabled interrupting condi tion. The C

45、PU can read the general status register to determine the interrupting condition(c), or can respond with an interrupt acknowledge cycle to cause the DUSCC to output an interrupt vector on the data bus. Interrupt acknowledge: Active low. When IACK is asserted, the DUSCC responds by placing the content

46、s of the interrupt vector register (modified or unmodified by status) on the data bus and asserting DTACKN. If no active interrupt is pending, DTACKN is not asserted. Crystal or external clock: When using the crystal oscillator, the crystal is connected between pins X1 and X2. used, an external cloc

47、k must be supplied at this input. This clock input is used to drive the internal bit rate generator, as an optional input to the counter/timer (CTI or digital phase lock loop (DPLL), and to provide other required clocking signals. Crystal or interrupt daisy chain: When a crystal is used as the timin

48、g source, the crystal is connected between pins X1 and X2. This pin can be programed to provide an interrupt daisy chain active low output which propagates the IACKN signal to lower priority devices if no active interrupt is pending. This pin should be grounded when an external clock is used on X1 and X2 and is not used as an interrupt daisy chain oiitput. The data If a crystal is not 5962-86810 STAN DARDI Z ED SIZE MILITARY DRAWING A DEFENSE UECTRONICS SUPPLY CENTER RMSMN LEVEL SHEET 22 DAYTON, OHK) 45444 I I I Q us. QOVERNMENT Pwma OFFICE: 1$87-%9040 SC FORM 193A EP 87 Provided by IHSNo