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本文(DLA SMD-5962-86822 REV F-2012 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS 4-LINE TO 16-LINE DECODER DEMULTIPLEXER MONOLITHIC SILICON.pdf)为本站会员(deputyduring120)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-86822 REV F-2012 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS 4-LINE TO 16-LINE DECODER DEMULTIPLEXER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor device type to case outline. Editorial changes in table I. 87-04-01 N. A. Hauck B Change code ident. no. to 67268. Add case outline 3 with terminal connections update. 87-11-17 R. P. Evans C Changes in accordance with NOR 5962-R326-92.

2、 92-10-09 Monica L. Poelking D Correct case outline letter in 1.2.2 from R to L. Correct the drawing title. Update boilerplate to current MIL-PRF-38535 requirements. - CFS 04-03-10 Thomas M. Hess E Redraw the waveforms and add test circuit and notes to figure 4, switching waveforms and test circuit.

3、 Editorial changes throughout. LTG 06-10-12 Thomas M. Hess F For VOH and VOLtests conditions change the expression for output current IO. Update boilerplate to current MIL-PRF-38535 requirements. jak 12-12-14 Thomas M. Hess CURRENT CAGE CODE IS 67268. REV SHEET REV SHEET REV STATUS REV F F F F F F F

4、 F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Jeffery Tunstall DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Dan DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Ha

5、uck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 4-LINE TO 16-LINE DECODER/DEMULTIPLEXER MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-09-30 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 5962-86822 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E107-13 Provided by IHS

6、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD

7、-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86822 01 J A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2

8、.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC154 4-line to 16-line decoder/demultiplexer 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designato

9、r Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V

10、dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIC) 20 mA DC output current (per pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power

11、dissipation (PD) . 500 mW 2/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55

12、C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns _ 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or netw

13、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, st

14、andards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification

15、for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies o

16、f these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references ci

17、ted herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appen

18、dix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML pr

19、oduct in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or fu

20、nction of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physic

21、al dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specifi

22、ed on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electri

23、cal performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS

24、, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-

25、38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the de

26、vice. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the Q

27、ML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an

28、approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuit

29、s delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to

30、review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8

31、6822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVIN=

32、VIHor VILIOH -20 A VCC= 2.0 V 1, 2, 3 01 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHor VILIOH -4.0 mA VCC= 4.5 V 3.7 VIN= VIHor VILIOH-5.2 mA VCC= 6.0 V 5.2 Low level output voltage VOLVIN= VIHor VILIOLL 20 A VCC= 2.0 V 1, 2, 3 01 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL 4.0 mA VCC= 4.

33、5 V 0.4 VIN= VIHor VILIOL 5.2 mA VCC= 6.0 V 0.4 High level input voltage 2/ VIHVCC= 2.0 V 1, 2, 3 01 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage 2/ VILVCC= 2.0 V 1, 2, 3 01 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0 V, TC= +25C See 4.3.1c 4 01 10 pF Quiescent su

34、pply current ICCVCC= 6.0 V VIN= VCCor GND 1, 2, 3 01 160 A Input leakage current IINVCC= 6.0 V VIN= VCCor GND 1, 2, 3 01 1 A Functional tests See 4.3.1d 7 01 Propagation delay time, address to output 3/ tPHL1, tPLH1CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 01 190 ns 10, 11 285 VCC= 4.5 V 9 38 10, 11 5

35、7 VCC= 6.0 V 9 32 10, 11 48 See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 T

36、ABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, chip select to output 3/ tPHL2, tPLH2CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 01 180 ns 10, 11 270 V

37、CC= 4.5 V 9 36 10, 11 54 VCC= 6.0 V 9 31 10, 11 46 Transition time 4/ tTLH, tTHLVCC= 2.0 V 9 01 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 1/ For a power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values shou

38、ld be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage so the 6.0 V values should be used. Power dissipation capacitance (CPD),

39、 typically 45 pF, determines the no load dynamic power consumption, PD= CPDx VCC2f + ICCx VCC, and the no load dynamic current consumption, IS= CPDx VCCf + ICC. 2/ Test is not required if applied as a forcing function for VOHor VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if

40、not tested, to the specified limits. 4/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME C

41、OLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines J and L 3 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 GND Y11 Y12 Y13 Y14 Y15 CS1 CS2 A3 A2 A1 A0 VCC-

42、 - - - NC Y0 Y1 Y2 Y3 Y4 Y5 NC Y6 Y7 Y8 Y9 Y10 GND NC Y11 Y12 Y13 Y14 Y15 CS1 NC CS2 A3 A2 A1 A0 VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA

43、 LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Inputs Low output * CS1 CS2 A3 A2 A1 A0 L L L L L L L L L L L L L L L L L H H L L L L L L L L L L L L L L L L H L H L L L L L L L L H H H H H H H H X X X L L L L H H H H L L L L H H H H X X X L L H H L L H H

44、L L H H L L H H X X X L H L H L H L H L H L H L H L H X X X Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 * * * * = All others high * = All outputs high H = High voltage level L = Low voltage level X = Immaterial FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networki

45、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 NOTE: With reference to the output equations: A = input A0, B = input A1, C = input A2, D = input A3. FIGURE 3. Log

46、ic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. CL= 50 pF minimum or equivalent (inc

47、ludes test jig and probe capacitance). 2. Input signal from pulse generator: VIN= 0.0 V to VCC; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.1 VCCto 0.9 VCCand from 0.9 VCCto 0.1 VCC, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with

48、 one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86822 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance

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