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本文(DLA SMD-5962-86825 REV C-2008 MICROCIRCUIT DIGITAL HIGH SPEED CMOS QUAD D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf)为本站会员(outsidejudge265)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-86825 REV C-2008 MICROCIRCUIT DIGITAL HIGH SPEED CMOS QUAD D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor 27014 for device type 012X. Changed limits for minimum recovery time reset inactive to clock. Changed symbol for minimum reset pulse width. Changed thermal resistance for case outline 2. 87-02-10 N. A. Hauck B Update boilerplate to MIL

2、-PRF-38535 requirements. Editorial changes throughout. LTG 03-05-15 Thomas M. Hess C Update boilerplate to MIL-PRF-38535 requirements. - LTG 08-10-20 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N

3、/A PREPARED BY Jeffery Tunstall CHECKED BY D. A. DiCenzo DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Robert P. Evans STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING AP

4、PROVAL DATE 86-09-16 MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, QUAD D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-86825 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E513-08 Provided by IHSNot for ResaleNo reproduction or networking perm

5、itted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B m

6、icrocircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86825 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) iden

7、tify the circuit function as follows: Device type Generic number Circuit function 01 54HC173 Quad D-type flip-flop with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDI

8、P1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output

9、 voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current 20 mA DC output current (per pin) 35 mA VCCor GND current (per pin) . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 2/ . 500 mW Lead temperature (soldering 10 seconds) . 260C Thermal resist

10、ance, junction-to-case (JC). See MIL-STD-1835 Junction temperature (TJ) 175C 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

11、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC). -55C to +125C Input r

12、ise or fall time (tr, tf): VCC= 2.0 V. 0 to 1000 ns VCC= 4.5 V. 0 to 500 ns VCC= 6.0 V. 0 to 400 ns Minimum setup time, D or DE to clock (tS): TC= +25C: VCC= 2.0 V. 100 ns VCC= 4.5 V. 20 ns VCC= 6.0 V. 17 ns TC= -55C to +125C: VCC= 2.0 V. 150 ns VCC= 4.5 V. 30 ns VCC= 6.0 V. 26 ns Minimum clock puls

13、e width (tW): TC= +25C: VCC= 2.0 V. 90 ns VCC= 4.5 V. 18 ns VCC= 6.0 V. 15 ns TC= -55C to +125C: VCC= 2.0 V. 135 ns VCC= 4.5 V. 27 ns VCC= 6.0 V. 23 ns Minimum hold time, clock to D or DE (tH): TC= +25C: VCC= 2.0 V. 25 ns VCC= 4.5 V. 5 ns VCC= 6.0 V. 5 ns TC= -55C to +125C: VCC= 2.0 V. 40 ns VCC= 4.

14、5 V. 8 ns VCC= 6.0 V. 7 ns Maximum clock frequency (fMAX): TC= +25C: VCC= 2.0 V. 5 MHz VCC= 4.5 V. 27 MHz VCC= 6.0 V. 32 MHz TC= -55C to +125C: VCC= 2.0 V. 3.6 MHz VCC= 4.5 V. 18 MHz VCC= 6.0 V. 21 MHz Minimum reset pulse width (tW): TC= +25C: VCC= 2.0 V. 100 ns VCC= 4.5 V. 20 ns VCC= 6.0 V. 17 ns T

15、C= -55C to +125C: VCC= 2.0 V. 150 ns VCC= 4.5 V. 30 ns VCC= 6.0 V. 26 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4

16、 DSCC FORM 2234 APR 97 Minimum recovery time, reset inactive to clock (tREC): TC= +25C: VCC= 2.0 V. 90 ns VCC= 4.5 V. 18 ns VCC= 6.0 V. 15 ns TC= -55C to +125C: VCC= 2.0 V. 135 ns VCC= 4.5 V. 27 ns VCC= 6.0 V. 23 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The

17、following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufactur

18、ing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Micro

19、circuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this dra

20、wing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance

21、 with MIL-PRF-38535, appendix A for non- JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535

22、 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall

23、not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The desig

24、n, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The trut

25、h table shall be as specified on figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.2.4 L

26、ogic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms. The switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table

27、 I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PR

28、F-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the

29、device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the

30、 QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source

31、 of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to

32、this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentat

33、ion. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISI

34、ON LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Group A subgroups Device type Limits Unit Conditions 1/ -55C TC +125C unless otherwise specified Min Max VCC= 2.0 V 1.9 VCC= 4.5 V 4.4 VIN= VIHor VILIO 20 A VCC= 6.0 V 5.9 VIN= VIHor VILIO 6.0 mA VC

35、C= 4.5 V 3.7 High level output voltage VOHVIN= VIHor VILIO 7.8 mA VCC= 6.0 V 1, 2, 3 All 5.2 V VCC= 2.0 V 0.1 VCC= 4.5 V 0.1 VIN= VIHor VILIO 20 A VCC= 6.0 V 0.1 VIN= VIHor VILIO 6.0 mA VCC= 4.5 V 0.4 Low level output voltage VOLVIN= VIHor VILIO 7.8 mA VCC= 6.0 V 1, 2, 3 All 0.4 V VCC= 2.0 V 1.5 VCC

36、= 4.5 V 3.15 High level input voltage 2/ VIHVCC= 6.0 V 1, 2, 3 All 4.2 V VCC= 2.0 V 0.3 VCC= 4.5 V 0.9 Low level input voltage 2/ VILVCC= 6.0 V 1, 2, 3 All 1.2 V Quiescent current ICCVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 All 160 A Input leakage current IINVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 All 1.0 A Th

37、ree-state output current IOZVO= VCCor GND, VIN= VIHor VIL1, 2, 3 All 10.0 A Input capacitance CINVIN= 0.0 V, TC= 25C See 4.3.1c 4 All 10.0 pF Functional tests See 4.3.1d 7 All L H VCC= 2.0 V 175 VCC= 4.5 V 35 TC= 25C CL= 50 pF 10% See figure 4 VCC= 6.0 V 9 All 30 ns VCC= 2.0 V 265 VCC= 4.5 V 53 Prop

38、agation delay time, clock to Q 3/ tPHL1, tPLH1TC= -55C, +125C CL= 50 pF 10% See figure 4 VCC= 6.0 V 10, 11 All 45 ns VCC= 2.0 V 150 VCC= 4.5 V 30 TC= 25C CL= 50 pF 10% See figure 4 VCC= 6.0 V 9 All 26 ns VCC= 2.0 V 225 VCC= 4.5 V 45 Propagation delay time, reset to Q 3/ tPHL2TC= -55C, +125C CL= 50 p

39、F 10% See figure 4 VCC= 6.0 V 10, 11 All 38 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SH

40、EET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Group A subgroups Device type Limits Unit Conditions 1/ -55C TC +125C unless otherwise specified Min Max VCC= 2.0 V 150 VCC= 4.5 V 30 TC= 25C CL= 50 pF 10% See figure 4 VCC= 6.0 V 9 All 26 ns VCC= 2.0

41、V 225 VCC= 4.5 V 45 Propagation delay time, output enable to Q 3/ tPZH, tPZLTC= -55C, +125C CL= 50 pF 10% See figure 4 VCC= 6.0 V 10, 11 All 38 ns VCC= 2.0 V 150 VCC= 4.5 V 30 TC= 25C CL= 50 pF 10% See figure 4 VCC= 6.0 V 9 All 26 ns VCC= 2.0 V 225 VCC= 4.5 V 45 Propagation delay time, output disabl

42、e to Q 3/ tPHZ, tPLZTC= -55C, +125C CL= 50 pF 10% See figure 4 VCC= 6.0 V 10, 11 All 38 ns VCC= 2.0 V 60 VCC= 4.5 V 12 TC= 25C CL= 50 pF 10% See figure 4 VCC= 6.0 V 9 All 10 ns VCC= 2.0 V 90 VCC= 4.5 V 18 Transition time 4/ tTHL, tTLHTC= -55C, +125C CL= 50 pF 10% See figure 4 VCC= 6.0 V 10, 11 All 1

43、5 ns 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leaka

44、ge currents (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 80 pF, determines the no load dynamic power consumption, PD= CPDVCC2f + ICCVCC, and the no load dynamic current consumption, IS= CPDVCCf + ICC.

45、2/ Tests not required if applied as a forcing function for VOHand VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified parameters. 4/ Transition times, if not tested, shall be guaranteed to the specified parameters. Provided by IHSNot for ResaleNo repr

46、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outlines E 2 Terminal numbers Terminal symbols Terminal symbols 1

47、2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OE1 OE2 Q0 Q1 Q2 Q3 CLOCK GND DE1 DE2 D3 D2 D1 D0 RESET VCC - - - - NC OE1 OE2 Q0 Q1 NC Q2 Q3 CLOCK GND NC DE1 DE2 D3 D2 NC D1 D0 RESET VCC NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking p

48、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86825 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 INPUTS OUTPUT OUTPUT ENABLES DATA ENABLES OE1 OE2 RESET CLOCK DE1 DE2 DATA D Q L L H X X X X L L L L L X X X no change L L L H X X X no change L L L H X X no change L L L X H X no change L L L L L L L L L L L L H H L L L X X X

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