DLA SMD-5962-86826 REV D-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add LCC package for vendor CAGE 27014. Changes to recommended operating conditions, minimum recovery time. 86-12-30 Michael A. Frye B Changes to input rise and fall time, table I, terminal connection, truth table, and code indent. no. from 14933

2、to 67268. Editorial changes throughout. 89-06-01 Michael A. Frye C Add test circuit and notes to figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF 38535. Editorial changes throughout. - jak 05-10-03 Thomas M. Hess D Update IOLand I

3、OHvalue in table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG11-07-26 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Jeffery Tunstall DLA LAND AND MAR

4、ITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Ray Monnin APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 4-BIT BIDIRECTIONAL U

5、NIVERSAL SHIFT REGISTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-09-30 REVISION LEVEL D SIZE A CAGE CODE 14933 5962-86826 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E450-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI

6、NG SIZE A 5962-86826 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or

7、Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86826 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circui

8、t function 01 54HC194 4 bit bidirectional universal shift register 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square leadless chip c

9、arrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp

10、diode current (IIK, IOK) . 20 mA DC output current (per pin) (IOUT) . 35 mA DC VCCor GND current (per pin) (ICC, IGND) . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-ca

11、se (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time: VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns Mini

12、mum setup time, input D to enable latch (ts): TC= +25C: VCC= 2.0 V 100 ns VCC= 4.5 V 20 ns VCC= 6.0 V 17 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless other

13、 wise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or n

14、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86826 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continued. Minimum setup time, input D to enable latch (ts): TC= -55C

15、 to +125C: VCC= 2.0 V 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 26 ns Minimum reset or CLK pulse width (tw): TC= +25C: VCC= 2.0 V 80 ns VCC= 4.5 V 16 ns VCC= 6.0 V 14 ns TC= -55C to +125C: VCC= 2.0 V 120 ns VCC= 4.5 V 24 ns VCC= 6.0 V 20 ns Minimum hold time, CLK to any input (th): TC= +25C: VCC= 2.0 V 25

16、ns VCC= 4.5 V 5 ns VCC= 6.0 V 5 ns TC= -55C to +125C: VCC= 2.0 V 40 ns VCC= 4.5 V 8 ns VCC= 6.0 V 7 ns Minimum setup time, S1, S0 to CLK (ts): TC= +25C: VCC= 2.0 V 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 26 ns TC= -55C to +125C: VCC= 2.0 V 225 ns VCC= 4.5 V 45 ns VCC= 6.0 V 38 ns Minimum setup time, SRSE

17、R or SLSER to CLK (ts): TC= +25C: VCC= 2.0 V 100 ns VCC= 4.5 V 20 ns VCC= 6.0 V 17 ns TC= -55C to +125C: VCC= 2.0 V 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 26 ns Minimum recovery time, rest inactive to CLK (tREC): TC= +25C: VCC= 2.0 V 100 ns VCC= 4.5 V 20 ns VCC= 6.0 V 17 ns TC= -55C to +125C: VCC= 2.0 V

18、 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 26 ns Maximum clock frequency (fMAX): TC= +25C: VCC= 2.0 V 6 MHz VCC= 4.5 V 30 MHz VCC= 6.0 V 35 MHz TC= -55C to +125C: VCC= 2.0 V 4 MHz VCC= 4.5 V 20 MHz VCC= 6.0 V 24 MHz Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

19、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86826 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of t

20、his drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MI

21、L-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online

22、at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specifie

23、d, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.je

24、dec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document

25、, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built

26、to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying

27、 activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described

28、 herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.

29、2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on

30、 figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86826 DLA LAND AND MARITIME C

31、OLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical

32、 test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein.

33、In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be

34、marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of complia

35、nce shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets th

36、e requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of chang

37、e to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offsho

38、re documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86826 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 D

39、SCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC+125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A 2.0 V 1, 2, 3 1.9 V 4.5 V 4.4 6.0 V 5.9 VIN= VIH

40、minimum or VILmaximum IOH= -4.0 mA 4.5 V 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA 6.0 V 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A 2.0 V 1, 2, 3 0.1 V 4.5 V 0.1 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA 4.5 V 0.4 VIN= VIHminimum or VILmaximum IOL= +5.2

41、mA 6.0 V 0.4 High level input voltage VIH2/ 2.0 V 1, 2, 3 1.5 V 4.5 V 3.15 6.0 V 4.2 Low level input voltage VIL2/ 2.0 V 1, 2, 3 0.3 V 4.5 V 0.9 6.0 V 1.2 Input capacitance CINTC= +25C VIN= 0 V See 4.3.1c 4 10 pF Quiescent current ICCVIN= VCCor GND 6.0 V 1, 2, 3 160 A Input leakage current IINVIN= V

42、CCor GND 6.0 V 1, 2, 3 1 A Functional tests See 4.3.1d 7 Propagation delay time, CLK to Q tPHL1, tPLH13/ CL= 50 pF 10% See figure 4 2.0 V 9 175 ns 4.5 V 35 6.0 V 30 2.0 V 10, 11 265 ns 4.5 V 53 6.0 V 45 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitt

43、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86826 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC+125C unless otherwise speci

44、fied VCCGroup A subgroups Limits Unit Min Max Propagation delay time, CLR to Q tPHL23/ CL= 50 pF 10% See figure 4 2.0 V 9 150 ns 4.5 V 30 6.0 V 26 2.0 V 10, 11 225 ns 4.5 V 45 6.0 V 38 Transition time tTLH, tTHL4/ CL= 50 pF 10% See figure 4 2.0 V 9 75 ns 4.5 V 15 6.0 V 13 2.0 V 10, 11 110 ns 4.5 V 2

45、2 6.0 V 19 1/ For power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for high-speed CMOS at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. The VIHvalue at 5.5 V is 3.85 V.

46、 The worst case leakage currents (IINand ICC) occur for high-speed CMOS at the higher voltages so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 45 pF, determines the no load dynamic power consumption, PD= CPD VCC2f + ICCVCC, and the no load dynamic current consumpti

47、on, IS= CPDVCCf + ICC. 2/ Test not required if applied as a forcing function for VOHor VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified parameters in table I. 4/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified lim

48、its in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86826 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outlines E 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 CLR SRSER A B C D SLSER GND S0 S1 CLK QD QC QB QA VCC- - - - - - - - - - - - NC CLR SRSER A B NC C D SLSER GND NC S0 S1 CLK QD NC QC QB QA VCCNC = No internal connecti