DLA SMD-5962-86833 REV D-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW POWER SCHOTTKY TTL NAND GATES MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change tPHL, footnotes, and IILin table I. Add figure 3. Add CAGE no. 04713. Editorial changes throughout. Change 1/ of paragraph 1.3. Change footnotes in Table I. Change test conditions for IIH, IIL, ICCH, ICCL, and IO. 88-05-23 M. A. Frye B Cha

2、nges IAW NOR 5962-R245-92. - wm 92-07-10 Monica L. Poelking C Update to reflect latest changes in format and requirements. Editorial changes throughout. - les 01-11-01 Raymond Monnin D Update drawing to current requirements. Editorial changes throughout. - gap 09-03-12 Robert M. Heber The original f

3、irst sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Monica L. Grosel DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc

4、.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY TTL, NAND GATES, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-07-29 MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67

5、268 5962-86833 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E456-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FOR

6、M 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86833 01 D X Dra

7、wing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS00 Quadruple, two-input, positive NAND gate 1.2.2 Case outline(s). The case outline

8、(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style D GDFP1-F14 or GDFP2-F14 14 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings.

9、Supply voltage . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) per device 1/ 16.5 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See M

10、IL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL): TC= +125C . 0.7 V dc TC= -55C 0.8 V dc TC= +25C . 0.8 V dc Case

11、operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test (e.g. IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

12、IZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent spe

13、cified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Stand

14、ard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/

15、quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in thi

16、s document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Prod

17、uct built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and

18、qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as

19、 described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and

20、herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as sp

21、ecified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall

22、 apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitte

23、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN lis

24、ted in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indi

25、cator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A cer

26、tificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets t

27、he requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of chan

28、ge to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at

29、 the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality

30、conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiri

31、ng activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II

32、 herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COL

33、UMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. 1/ 2/ Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVIL= 0.8 V 1, 3 2.5 V VIH= 2.0 V, VCC= 4.5 V,

34、 IOH= -0.4 mA 3/ 4/ VIL= 0.7 V 2 Low level output voltage VOLVIL= 0.8 V 1, 3 0.4 V VIH= 2.0 V, VCC= 4.5 V, IOL= 4.0 mA 5/ 4/ VIL= 0.7 V 2 Input clamp voltage VI CVCC= 4.5 V, IIH= -18 mA 1, 2, 3 -1.5 V High level input current II H1 VCC= 5.5 V, VIN= 2.7 V, All other inputs = 0.0 V 1, 2, 3 20 A II H2

35、VCC= 5.5 V, VIN= 7.0 V, All other inputs = 0.0 V 1, 2, 3 100 A Low level input current IILVCC= 5.5 V, VIN= 0.4 V, All other inputs = 4.5 V 1, 2, 3 -0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 6/ 1, 2, 3 -20 -112 mA High level supply current ICCHVCC= 5.5 V, VIN 0.4 V (All inputs) 1, 2, 3 0.85 mA

36、 Low level supply current ICCL VCC = 5.5 V, VIN 4.5 V (All inputs) 1, 2, 3 3.0 mA Functional tests See 4.3.1c 7/ 7, 8 tPHL 9, 10, 11 1 9 ns Propagation delay time, A, B to Y tPLH VCC= 4.5 V to 5.5 V, CL= 50 pF, RL= 500 8/ See figure 3 9, 10, 11 2 15 ns 1/ Unused inputs that do not directly control t

37、he pin under test must be 2.5 V or 0.4 V. 2/ Unused inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 3/ One input to gate under test must be VIL, the other inputs shall be 2.0 V. 4/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminim

38、um produces the proper output state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 5/ One input to gate under test must be = VIH, the other inputs shall be 2.0 V. 6/ The output conditions have been chosen to produce a current that closely approximat

39、es one-half of the true short circuit output current, IOS. Not more than one output will be tested at a time and the duration of the test condition shall not exceed one second. 7/ Functional tests shall be conducted at input test conditions of 0.0 V VIL VOLand VOH VIH VCC. 8/ The propagation delay l

40、imits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEE

41、T 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines D 2 Terminal number Terminal symbols 1 1A NC 2 1B 1A 3 1Y 1B 4 2A 1Y 5 2B NC6 2Y 2A 7 GND NC 8 3Y 2B 9 3A 2Y 10 3B GND11 4Y NC 12 4A 3Y13 4C 3A 14 VCC 3B15 NC16 4Y 17 NC18 4A 19 4B 20 VCC FIGURE 1. Terminal connections. Inputs Output A B Y H H L

42、 L X HX L H Positive logic Y = AB H = High voltage level L = Low voltage level X = Irelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBU

43、S, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISI

44、ON LEVEL D SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 10 MHz, duty cycle 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Test circuit

45、and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test

46、 requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Gr

47、oups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria sha

48、ll apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the man