DLA SMD-5962-86837 REV D-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW POWER SCHOTTKY TTL NAND GATES MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add figure 3. Table I, change tPHL, tPLH, IIL, and footnotes. Editorial changes throughout. 88-04-08 M. A. Frye B Changes in accordance with NOR 5962-R100-92. 92-07-06 Monica L. Poelking C Update to current requirements. Editorial changes through

2、out. - gap 06-01-18 Raymond Monnin D Update drawing as part of 5 year review. - jt 12-12-10 C. SAFFLE The original first page of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Monica L Grosel DLA LAND AND MA

3、RITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, BIPOLAR ADVANCED LOW POWER, SCHOTTKY

4、 TTL, NAND GATES, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-08-24 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-86837 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E075-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

5、ING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or

6、 Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86837 01 D X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit

7、function 01 54ALS30 Single, 8-input positive NAND gate 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style D GDFP1-F14 or CDFP2-F14 14 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead f

8、inish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation, (PD) per device 1/

9、. 4.95 mW Lead temperature (soldering 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (Tj) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V

10、dc Maximum low level input voltage (VIL): TC= +125C . 0.7 V dc TC= -55C 0.8 V dc TC= +25C . 0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test, e.g., IO. Provided by IHSNot for

11、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. T

12、he following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufac

13、turing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Mi

14、crocircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this draw

15、ing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance

16、with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 m

17、ay be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall no

18、t affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design,

19、 construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Logic diagram and terminal connections. The logic diagram and terminal connections shall be as specified on fig

20、ure 1. 3.2.3 Truth tables. The truth table shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performan

21、ce characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by

22、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, append

23、ix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 C

24、ertification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow optio

25、n is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved sou

26、rce of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered

27、to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the ma

28、nufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Scre

29、ening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintain

30、ed by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MI

31、L-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permi

32、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C (Unless otherwise specified) Group A

33、subgroups Limits Unit Min Max High level output voltage VOHVIH= 2.0 V, VCC = 4.5 V, IOH = -0.4 mA 3/ 4/ VIL= 0.8 V 1, 3 2.5 V VIL= 0.7V 2 Low level output voltage VOLVIH= 2.0 V, VCC = 4.5 V, IOL = 4.0 mA 4/ 5/ VIL= 0.8 V 1, 3 0.4 V VIL= 0.7V 2 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -

34、1.5 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V, All other inputs = 0.0 V 1, 2, 3 20 A IIH2VCC= 5.5 V, VIN= 7.0 V, All other inputs = 0.0 V 1, 2, 3 100 A Low level input current IILVCC = 5.5 V; VIN = 0.4 V, All other inputs = 4.5 V 1, 2, 3 - 0.1 mA Output current IOVCC = 5.5 V, VOUT= 2.25

35、V 6/ 1, 2,3 -20 -112 mA High level supply current ICCHVCC = 5.5 V, VIN 0.4 V (All inputs) 1, 2, 3 0.36 mA Low level supply current ICCLVCC = 5.5 V, VIN 4.5 V (All inputs) 1, 2, 3 0.9 mA Functional tests See 4.3.1c 7/ 7, 8 Propagation delay time; any input to Y tPHLVCC = 4.5 V to 5.5 V CL = 50 pF, RL

36、 = 500 8/ See figure 3 9, 10, 11 3 14 ns tPLH9, 10, 11 3 12 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. 2/ Unused inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 3/ One input to gate under test must = VIL, the other inputs

37、 shall be 2.0 V 4/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 5/ One input to gate under test must = VIH, the other inputs

38、shall be 2.0 V. 6/ The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one output will be tested at at time and the duration of the test condition shall not exceed 1 second. 7/ Functional tests sh

39、all be conducted at input test conditions of 0.0 V VIL VOLand VOH VIH VCC. 8/ The propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA

40、WING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 FIGURE 1. Logic diagram and terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

41、 A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Input Output A B C D E F G H Y H H H H H H H H L All other combinations of H and L at the inputs give H output. Positive logic Y = ABCDEFGH H = High voltage level L = Low voltage level FIGURE

42、 2. Truth table. NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics PRR 10 Mhz, duty cycle = 50 %, tr = tf = 3 ns 1 ns. 3. The outputs are measured one at a time with one input transistor per measurement. FIGURE 3. Switching waveforms and test circ

43、uit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 te

44、st requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electri

45、cal parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspec

46、tion. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in

47、 table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The te

48、st circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86837 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION