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本文(DLA SMD-5962-86840 REV F-2011 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL COUNTER MONOLITHIC SILICON.pdf)为本站会员(postpastor181)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-86840 REV F-2011 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL COUNTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change ripple carry truth table. Code ident. no. changed to 67268. 87-07-01 M. A. Frye B Split VILinto temperatures. Change propagation delays. Add footnotes to table I. Add figures 4 and 5. Change footnote 1/ of 1.3. Change in table II. Editoria

2、l changes throughout. 88-05-12 M. A. Frye C Changes in accordance with NOR 5962-R239-92. 92-07-10 Monica L. Poelking D Changes in accordance with NOR 5962-R135-96. 96-06-05 Monica L. Poelking E Redraw with changes. Update to current requirements. Editorial changes throughout. - gap 05-12-06 Raymond

3、Monnin F Update drawing as part of 5 year review. - jt 11-02-02 C. SAFFLE CURRENT CAGE CODE 67268 The original first page of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY David W. Queene

4、n DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY David H. Johnson APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-P

5、OWER SCHOTTKY TTL, COUNTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-11-10 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 5962-86840 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E207-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC

6、IRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

7、1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86840 01 E X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic numb

8、er Circuit function 01 54ALS191A Synchronous 4-bit up/down binary counter 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat p

9、ackage 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc minimum to 7.0 V dc maximum Input voltage range -1.5 V dc at -18 mA to 7.0 V dc Storage temperature range . -65C t

10、o +150C Maximum power dissipation (PD) 1/ 121 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to +5.5 V dc maximum Minimum

11、high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL): VIL= +125C . 0.7 V dc VIL= +25C . 0.8 V dc VIL= -55C 0.8 V dc Case operating temperature range (TC) -55C to +125C Pulse width: CLK high or low 20 ns minimum LOAD low 25 ns minimum _ 1/ Maximum power dissipation is defined

12、 as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3

13、 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the so

14、licitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMEN

15、T OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Ph

16、iladelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has b

17、een obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The in

18、dividual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been gra

19、nted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the

20、 requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design,

21、construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as sp

22、ecified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Timing sequence. The timing sequence shall be as specified on figure 4. 3.2.6 Switching circuit and waveforms. The switching ci

23、rcuit and waveforms shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirement

24、s. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the

25、manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non

26、-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be requ

27、ired from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of

28、 MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and

29、 Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation

30、 shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 AP

31、R 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -0.4 mA VIH= 2.0 V 2/ VIL= 0.7 V 2 2.5 V VIL= 0.8 V 1, 3 Low level output voltage VOLVCC= 4.5 V

32、, IOL= 4.0 mA VIH= 2.0 V 2/ VIL= 0.7 V 2 0.4 V VIL= 0.8 V 1, 3 Input clamp voltage VICVCC= 4.5 V IIN= -18 mA 1, 2, 3 -1.5 V Low level input current at CTEN , CLK IIL1VCC= 5.5 V, VIN= 0.4 V, Unused inputs 4.5 V 1, 2, 3 -0.2 mA Low level input current at all other inputs IIL2VCC= 5.5 V, VIN= 0.4 V, Un

33、used inputs 4.5 V 1, 2, 3 -0.2 mA High level input current IIH1VCC= 5.5 V, VIN= 2.7 V, All other inputs = 0.0 V 1, 2, 3 20 A IIH2VCC= 5.5 V, VIN= 7.0 V All other inputs = 0.0 V 1, 2, 3 0.1 mA Output current IOVCC= 5.5 V VOUT= 2.25 V 3/ 1, 2, 3 -20 -112 mA Supply current ICCVCC= 5.5 V, All inputs 0.4

34、 V 1, 2, 3 22 mA Functional tests See 4.3.1c 4/ 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET

35、 6 DSCC FORM 2234 APR 97 Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Maximum clock frequency fMAXVCC= 4.5 V to 5.5 V, CL= 50 pF, RL= 500 5/ See figures 4 and 5 9, 10, 11 20 MHz Propagation delay time, LOAD to any Q tPLH19, 10, 11 7 34 ns tPHL

36、19, 10, 11 8 31 ns Propagation delay time, A, B, C, D to any Q tPLH29, 10, 11 3 21 ns tPHL29, 10, 11 4 22 ns Propagation delay time, CLK to RCO tPLH39, 10, 11 5 24 ns tPHL39, 10, 11 5 24 ns Propagation delay time, CLK to any Q tPLH49, 10, 11 3 20 ns tPHL49, 10, 11 3 21 ns Propagation delay time, CLK

37、 to MAX/MIN tPLH59, 10, 11 8 34 ns tPHL59, 10, 11 8 34 ns Propagation delay time, U/D to RCO tPLH69, 10, 11 8 42 ns tPHL69, 10, 11 10 33 ns Propagation delay time, U/D to MAX/MIN tPLH79, 10, 11 8 30 ns tPHL79, 10, 11 8 30 ns Propagation delay time, CTEN to RCO tPLH89, 10, 11 4 18 ns tPHL89, 10, 11 4

38、 21 ns 1/ Unused inputs that do not directly control the pin under test must be put 2.5 V or 0.4 V. The inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper out

39、put state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one output will be tested at a ti

40、me and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reprod

41、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 Case outlines E and F 2 Terminal number Terminal symbol 1 B NC 2 QBB 3 QAQB4 CTENQA5 U/DCTEN6 QCN

42、C7 QDU/D8 GND QC9 D QD10 C GND 11 LOADNC 12 MAX/MIN D 13 RCOC 14 CLK LOAD15 A MAX/MIN 16 VCCNC 17 - RCO18 - CLK 19 - A 20 - VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8

43、6840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Mode select Inputs Mode LOAD CTEN U/D CLK H L L _| Count up H L H _| Count down L X X X Preset (asyn) H H X X No change (hold) Ripple carry Inputs Outputs Count status CTEN CLK MAX/MIN RCO L |_| _|_ |

44、_| Either 15 while counting up or 0 while counting down. H X X H All conditions (hold) X X L H All conditions other than 15 while counting up or 0 when counting down. L = Low voltage level H = High voltage level X = Dont care _| = Low-to-high clock transition _|_ = One high level pulse |_| = One low

45、 level pulse FIGURE 2. Truth tables. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagra

46、m. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Timing sequence. Provided by IHSNot for Resal

47、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 11 DSCC FORM 2234 APR 97 NOTES: 1. CL includes probe and jig capacitance. 2. All input pulses have the followin

48、g characteristics: PRR 10MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 5. Switching circuit and waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86840 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

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