DLA SMD-5962-87517 REV C-2009 MICROCIRCUIT DIGITAL LOW POWER SCHOTTKY TTL BINARY COUNTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes according to NOR 5962-R125-92. tvn 92-02-05 Mionica L. Poelking B Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 01-11-29 Raymond Monnin C Update drawing to current requirements. Editorial

2、changes throughout. - gap 09-03-18 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUI

3、T DRAWING CHECKED BY Robert P. Evans COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, LOW POWER SCHOTTKY TTL, BINARY COUNTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-01-

4、26 MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-87517 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E457-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER C

5、OLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The compl

6、ete PIN is as shown in the following example: 5962-87517 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LS590 8-bit binary

7、counter with three-state output registers 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Square

8、 chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V to +7.0 V Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 357 mW Lead temperature (soldering, 10 seconds) . +300C Junct

9、ion temperature (TJ) . +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Input voltage range . -1.5 V at -18 mA to +7.0 V Off-state output voltage, maximum . 5.5 V _ 1/ Must withstand the added PD, due to short-circuit test, e.g., IOS. Provided by IHSNot for ResaleNo reproduction or

10、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high le

11、vel input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Maximum high level output current: RCO . -1 mA Q . -1 mA Maximum low level output current: RCO . 8 mA Q . 12 mA Counter clock frequency (fCCK) 0 MHz to 20 MHz Register clock frequency (fRCK) . 0 MHz to 25 MHz Minimum c

12、ounter clock pulse width (tWCCK) 25 ns Minimum counter clear pulse width (tWCCLR) . 20 ns Minimum register clock pulse width (tWRCK) 20 ns Minimum setup time (tsu) : CCKEN 20 ns CCLR . 20 ns CCK before RCK2/ 40 nsMinimum hold time (th) 0 ns Case operating temperature range (TC) -55C to +125C 2. APPL

13、ICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPART

14、MENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDB

15、K-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2

16、 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 2/ This setup t

17、ime ensures the register will see stable data from the counter outputs. The clocks may be tied together in which case the register state will be one clock pulse behind the counter. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

18、 DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as sp

19、ecified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approv

20、ed program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall n

21、ot affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38

22、535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic di

23、agram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified

24、in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance wit

25、h MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“

26、 on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify

27、when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approve

28、d source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits deliv

29、ered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required do

30、cumentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

31、0 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V, IOH= -1 mA, VIN= 0.7 V or 2.0 V 1, 2, 3 2.4 V Low level outp

32、ut voltage VOLVCC= 4.5 V, IOL= 8 mA RCO output 1, 2, 3 0.4 V IN= 0.7 V or 2.0 V IOL= 12 mA Q output 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.5 V High level input current IIH1 VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 0.1 mA IIH2 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 20 A Low level input

33、 current IILVCC= 5.5 V, CCK input 1, 2, 3 -0.8 mA VIN= 0.4 V All other inputs 1, 2, 3 -0.2 mA RCO output 1, 2, 3 -20 -100 mA Short-circuit output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ Q output 1, 2, 3 -30 -130 mA Off-state output current, high level voltage applied IOZHVCC= 5.5 V, VOUT= 2.7 V, VIN=

34、0.7 V or 2.0 V 1, 2, 3 20 A Off-state output current, low level voltage applied IOZLVCC= 5.5 V, VOUT= 0.4 V, VIN= 0.7 V or 2.0 V 1, 2, 3 -20 A Supply current ICCH 1, 2, 3 55 mA ICCL 1, 2, 3 65 mA CCZ VCC= 5.5 V, All possible inputs grounded, all outputs open 1, 2, 3 65 mA Functional test See 4.3.1c

35、7 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electric

36、al performance characteristics - Continued. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max Maximum count frequency fMAX9 20 MHzVCC= 5.0 V, RL= 666 , CL= 45 pF 10, 11 12 MHz tPLH122 ns 10, 11 31 tPHL1 9 30 ns Propagation delay time, CCK to RCO VCC

37、= 5.0 V RL= 1 k CL= 30 pF See figure 4 10, 11 43 ns tPLH2 9 45 Propagation delay time, CCLR to RCO 10, 11 64 ns tPLH318 10, 11 26 ns tPHL3 9 33 ns Propagation delay time, RCK to Q VCC= 5.0 V RL= 667 CL= 45 pF See figure 4 10, 11 47 ns tPZH 9 38 10, 11 60 ns tPZL 45 Propagation delay time, G to Q 10,

38、 11 64 ns tPHZ9 30 10, 11 43 ns tPLZ 9 38 ns Propagation delay time, G to Q VCC= 5.0 V RL= 667 CL= 5 pF See figure 4 10, 11 60 ns 1/ Not more than one output should be shorted at a time and the duration of the short-circuit condition should not exceed one second. Provided by IHSNot for ResaleNo repr

39、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Case outlines E and F 2 Terminal number Terminal symbol 1 QBNC 2 QCQB 3 QD QC 4 QE QD

40、5 QF QE 6 QG NC 7 QH QF 8 GND QG 9 RCO QH 10 CCLR GND 11 CCK NC 12 CCKEN RCO 13 RCK CCLR 14 G CCK 15 QA CCKEN 16 VCCNC 17 RCK 18 G 19 QA 20 VCCNC = No connection FIGURE 1. Terminal connections. Inputs G CCLR CCKEN CCK RCK Device state H X X X X Disabled L L X X Clear L H H X X No change L H L X Inte

41、rnal count L H L External count H = High level voltage L = Low level voltage X = irrelevant = Low to high clock transition. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE

42、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS C

43、OLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COL

44、UMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. The pulse generator shall have the following characteristics: PRR 1 MHz; tR 15 ns; tF 6 ns. 2. CLincludes scope probe, wiring, and stray capacitance without the package in the test fixture. 3. All diodes are 1N3064, 1N9

45、16, or equivalent. 4. Switches S1and S2shall be set for enable and disable time tests as follows: tPZL: S1closed, S2open tPZH: S1open, S2closed tPLZand tPHZ: S1and S2closed FIGURE 4. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitte

46、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87517 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-

47、38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, o

48、r D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be a