DLA SMD-5962-87519 REV A-1991 MICROCIRCUITS DIGITAL NMOS GENERAL PURPOSE INTERFACE BUS CONTROLLER MONOLITHIC SILICON《硅单块 通用接口总线控制器N沟道金属氧化物半导体 数字微型电路》.pdf

1、DATE (YYHHDD) NOTICE OF REVISION (NOR) (See MIL-STD-480 for instructions) 91/09/20 This revision described below has been authorized for the dociinient listed. Defense Electronics Supply Center Dayton, Ohio 45444-5277 Foi m Approved OMCi NO, 0704-0188 67268 4. CAGE CODE 5962-Roll-91 5. DOCUMENT NO.

2、6. TITLE OF DOCUMENT 8. ECP NO. I 67268 5962-87519 7. REVISION LETTER 9. CONFIGURATION ITEM (OR SYSTEM) TO UHICH ECP APPLIES MICROCIRCUITS, DIGITAL, NWOS, GENERAL, PURPOSE INTERFACE BUS CONTROLLER, MONOLITHIC SI LI CON 10. DESCRIPTION OF REVISIOM L/ Sheet 1: Revisions ltr column; add iiAia Revisions

3、 description column; add Vhanges in accordance with NOR 5962-ROI 1-91“. Revisions date column; add “91 -09-2011. (Current) initial I (NW) A Sheet 4: Change Table I, Input Current (11) FROM: VCC = 4.75 V TO: VCC = 5.25 V Sheet 5: Change Table I, Delay of BI interrupt from DAV true (td6)FROEl: BI inte

4、rrupt unmasked, ATN = false, device in LASC TO: BI interrupt unmasked, ATN = false, device in LACS. Sheet 8: Change Table I, Clock high pulse duration (tu(Theta H) FROM: 1955 ns Min TO: 1955 ns Max Sheet 30: Change Pin Description No. 39 (TR) FROi: . the get comand is given by the MPU TO: . the fget

5、 coiimand 1s given by the MPU. b. ACTIVITY AUTHORIZED TO APPROVE CHANGE FOR GOVERNMENT DESC-ECC 12. ACTIVITY ACCOHPLISHING REVISION DESC-ECC Notes: DATE (YYMMDD) 91 /09/20 DATE (YYMMDD) q/09/20 - I/ These changes were previously approved 2 JUN 88 for incorporation into the next action of drawing 596

6、2-87519. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-59bZ-875L9 REV A 59 m 999999b 000b233 b m i J LTR 1 7- 5-2 - 33 DESCRIPTION DATE (YR-MO-DA) APPROVED SHEET REV STATUS OF SHEETS PMIC NIA STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILA

7、BLE FOR USE BY ALL DEPAITIMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA PREPARED BY 74 Fd DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUITS, DIGITAL. NMOS. GENERAL PURPOSE INTERFACE BUS CONTROLLER, MONOLITHICSILICON SIZE CAGE CODE 1 13 MAY 1988 1 A I 67268 15962-87519 REV

8、ISION LEVEL I . I SHEET 1 OF 31 DESC FORM 193 SEP 87 * U.S. MVIRHMIHT PRINTIM OFFICE: 1987 - 748-129160911 5962-E233 DISTRIBUTION STATEMENT A. Approved for public release; distribution IC unlimiled. .- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

9、1 SMD-59b2-875L9 REV A 59 999999b 000b234 8 M L I STANDARDIZED SIZE A 1. SCOPE 1.1 Scope. This drawing describes device requirements for class B microcircuits in accordance with 1 non-JAN devices.“ MIL-STD-883, “Provi sions for the use of MIL-STD-883 in conjunction with compl iant 1.2 Part number. T

10、hecomplete part number shall be as shown in the following example: X 7- I 5962-87519 o1 I l I I l I I l I I I I + I Drawing number Device type Case outline Lead finish per (1.2 .i) (1.2.2) MIL-M-38510 1.2.1 Device type. The device type shall identify the circuit function as follows: 5 962- 87 5 19 D

11、evice type Generic number Circuit function o1 9914A General purpose i nterface bus (GPIB control 1 er MILITARY DRAWING DEFENSE ELECTRONICC SUPPLY CENTER DAYTON, OHIO 45444 1.2.2 Case outlines. The case outlines shall be as designated in appendix C of MIL-M-38510, and as follows: REVISION LEVEL SHEET

12、 2 Out1 i ne 1 etter Q X Case out1 ine 0-5 (40-lead, 2.096“ x .620“ x .225“), dual-in-line package C-5 (44-terminal, .662“ x ,662“ x .120“), square chip carrier package 1.3 Absolute maximum ratings. Supply voltage range (Vc-1- - - - - - - - - - - - - - - - - - Input voltage range - - - - - - - - - -

13、 - - - - - - - - - - - -0.3 V dc to 20 V dc -0.3 V dc to 20 V dc -0.3 V dc to 20 V dc 1.0 w -55C to t150“C See MIL-M-38510, appendix C +3OO0C Output voltage range- - - - - - - - - - - - - - - - - - - - - Storage temperature range - - - - - - - - - - - - - - - - - - Thermal resistance, junction-to-ca

14、se (e cl- - - - - - - - Lead temperature (soldering, 10 secondsj- - - - - - - - - - - Continuous power dissipation- - - - - - - - - - - - - - - - - 1.4 Recommended operating conditions. supply voltage (VCC) - - - - - - - - - - - - - - - - - Supply voltage,(Vss) - - - - - - - - - - - - - - - - - - -

15、- High level input voltage (VIH) - - - - - - - - - - -.- - - - Low level input voltage (V )- - - - - - - - - - - - - - - - High level output current - - - - - - - - - - - - - Outputs REN and IFC only - - - - - - - - - - - - - - - - - Low level output current (10) - - - - - - - - - - - - - - - Case o

16、perating temperature range (TC)- - - - - - - - - - - - ii outputs except REN, Iee footnotes at end of table, I I 1 *U. S. GOVERNMENT PRINTING OFFICE 1988-549-94 DESC FORM 193A SEP a7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-5962-875L9 REV

17、A 59 9999996 O006243 5 STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 TABLE I. Electrical performance characteristics - Continued. l-/ SIZE A 5962-87519 REVISION LEVEL SHEET 9 I : Test I 1 tlh ICCGR setup time I Conditions -55C cc NOTE: th(AD) and th(DA) are shown

18、 measured from the rising edge of This is the correct reference pointin this figure, since the measurements should be from the rising edge of WE or CE - whichever comes first. FIGURE 5. Switching test circuits and waveforms - Continued. STANDARDIZED MILITARY DRAWING DEFENSE ELECIRONICS SUPPLY CENTER

19、 DAYTON. OHIO 45444 ESC FORM 193A SEP a7 REVISION LEVEL * US. GOVERNMENT PRINTING OFFICE: 1987-549496 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I SMD-5962-75I9 REV A 59 9999996 0006253 I = ACCGR Device type O1 L r DMA READ OPERATION SIZE STANDA

20、RDIZED A 5962-8751 9 DEIN WE MILITARY DRAWING . 00-07 J NOTE A write-enable pulse may occur in a DMA read operation. pulse may therefore be provided for system memory and need not be suppressed at the device. A write-enable FIGURE 5. Switching test circuits and waveforms - Continued. I DEFENSE ELECT

21、RONICS SUPPLY CENTER DAMON. OHIO 45444 I REVISION LEVEL I SHEET 21 1 I 1 DESC FORM 193A U.S. GOVERNMENT PRINTING OFFICE. 1987-549446 SEP a7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-i 7I r i SMD-5962-87517 REV A 59 9999996 0006254 3 Device type

22、 O1 DMA WRITE OPERATION NOTE: become inactive, whether it is WE or ACCGR. t,u(QA) and th(DA) are fily applicable to the first signa FIGURE 5. Switching test circuits and waveforms - Cont to nued. SIZE 5962-8751 9 A STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CEMER REVISION LEVEL SHEET 2

23、2 DAYTON, OHIO 45444 ESC FORM 193A * US. GOVERNMENT PRINTING OFFffiE 1987-549496 SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5962-87517 REV A 59 = 9999996 0006255 5 , Ir L r- / / ACCRO -J ACCGR DAV Device type O1 / / - td5 - L - tdl l

24、i SOURCE AND ACCEPTOR HANDSHAKE TIMING ACCRQ S O U R C E A C C E PC T O R +b6d (SEE NOTE 2) 0108-O101 I STANDARDIZED MILITARY DRAWING DEFENSE UECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 INT SIZE 5962-8751 9. A REVISION LEVEL SHEET 23 ptd3+ (SEE NOTE I) I d9 - NRFD 1 INT ES : The interrupt line is ta

25、ken low by a BO interrupt. The interrupt line is taken low by a Bi interrupt. NO 1. 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device type O1 ACCEPTOR HANDSHAKE TIMING “ ATN II TRUE DAV - L i L *tdi3 -w - T O R R C E lo“ol NDAC - INT - GE WE

26、I n VL td12 READ INTERRUPT WRITE dacr TO STATUS AU XI Li ARY COMMAND REGISTER NOTE: The broken line shows the waveform if there is no DAC holdoff. The sol id 1 i nes assume there i s a DAC hol doff. FIGURE 5. Switching test circuits and waveforms - Continued. SIZE 5962-8751 9 A STANDARDIZED M I LITA

27、RY DRAW IN G I REVISION LEVEL SHEET 24 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 I I I ESC FORM 193A *L.s. COVERWIEYT PRI?TISC OFFICE: 198: . in.iz9.ur)u SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-5762-875L7 REV A 59 999999

28、6 0006257 9 , rp . STANDARMZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CFR DAYTON, OHIO 45444 Device type O1 RESPONSE TO IATN“ AND “EOI“ 5962-8751 9 SIZE A SHEET 25 REVISION LEVEL AT N EO1 TE NRFD NDAC DAV D108-DIOl IFC -I- HI-2 - tdi7 (SEE NOTE I 1 7 t ,I I, r e td19 IN T NOTES : I 1. This assu

29、mes that an RFD holdoff occurs. 2. IFC causes the device to be unaddressed and an IFC interrupt occurs. FIGURE 5. Switching test circuits and waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device type 01 CONTROLLER TIMING AT N

30、 - - td20t d2 2 EO I - INT c CE , - WE U WRITE tcs or tca LAU ULI READ INT SET CLEAR WRITE NOTE: A BO interrupt occurs as the device enters CACS. FIGURE 5. Switching test circuits and waveforms - Continued. 5962-87519, SIZE A STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION L

31、EVEL SHEET 26 DAYTON, OHIO 45444 DESC FORM 193A 7!7 U S. GOVERNMENT PRINTING OFFICE 1987-549096 SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-875L9 REV A 59 6 999999b 000b259 2 6 Ir L STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONIC

32、S SUPPLY CENTER DAYTON, OHIO 45444 3.6 Certificate 0.f conformance. A certificate of conformance as required in MIL-STD-883 see 3.1 herein) shall be provided with each lot of microcircuits delivered to this drawing. SIZE A 5962-87519 REVISION LEVEL SHEET 27 3.7 Notification of change. Notification o

33、f change to DESC-ECS shall be required in accordance fith MIL-STD-883 ( see 3.1 herei nl . 3.8 Verification and review. DESC, DESCs agent, and the acquiring activity retain the option to *eview the manufacturers facility and applicable required documentation. ;hall be made available onshore at the o

34、ption of the reviewer. Offshore documentation 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. 4.2 Screening. Sampling and inspection procedures shall be in accordance with ,ection 4 of MIL-M-38510 to the extent specified in MIL-STD-883 (see 3.1 herein). :onducted on al 1 devices prior t

35、o. quality conformance inspection. ;hall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) (2) TA = +125C, minimum. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion o

36、f the manufacturer. Qual i ty conformance inspection shall be in accordance with Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be The following additional criteria Test condition D using the circuit submitted with the certificate of compliance (see 3.5 herein). b. 4.3 Q

37、ual i ty conformance i nspection. iethod 5005 of MIL-STD-883 including groups A, B, C, and D inspections. :riteria shall apply. The following additional 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be o

38、mitted. c. Subgroup 4 (GIN measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance, d. Subgroups 7 and 8 tests shall verify the functionality of the device. It forms a part of the vendors test tape and shall be maintained and av

39、ailable from the approved sources of supply. DESC FORM 193A - SEP 87 t U. C. GOVERNMENT PRINTING OFFICE: 1988-549-904 a Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I SMD-5762-83519 REV A 59 D 9999996 0006260 9 W -r il - . SIZE A STANDARDIZED TABL

40、E II. Electrical test requirements. L/ g/ 5962-87519 Subgroups MIL-STD-883 test requirements I (per method I 5005, table I) I I Interim electrical parameters I (method 5004 1 I 1 I I * Fi na1 electrical test parameters 2 8, (method 5004) I ;,li: 1; I Group A test requirements 3 8, (method 5005 1 I i

41、: :S,3i1 I Groups C and D end-point electrical parameters (method 5005) I I 2, 8, 10 1/ * indicates POA amlies to subarouo 1. f/ ny or al 1 subgroupc may be combined when using - high-speed testers, 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table I

42、I herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition D using the circuit submitted with the certificate of compliance (see 3.5 herei n) . (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. . 5. PACKAGI

43、NG 5.1 Packaging requirements, The requirements for packaging shall be in accordance with !IL-M-38510 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use when military ,pecifications do not exist and qualified military devices that will perform the required funct

44、ion ire not available for OEM application. ,y this drawing has been qualified for listing on QPL-38510, the device specified herein will be nactivated and will not be used for new design. The QPL-38510 product shall be the preferred item :or al 1 appl ications. When a military specification exists a

45、nd the product covered 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device :overed by a contractor-prepared specification or drawing, 6.3 Comments. Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or :elephone 513-296-537 5. f DE

46、FENSE ELECTRONICS SUPPLY CENTER DAMON, OHIO 45444 I SHEET I LEVEL 25 DESC FORM 193A SEP 87 t U. S. GOVERNMENT PRINTING OFFICE: 1988-549-904 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-6.4 Pin descriptions, i I I I I Pin L/ II/O I I I (type) I III

47、 I i Description STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE A 5962-87519 REVISION LEVEL SHEET 29 i 2 i i I i Access granted. When received from the direct-memory-access control logic, I I I I this enables the byte onto the data bus. ACCGR must be high whe

48、n not 1 participating in DMA transfer. ! ! I I I I l I I 3; cl? I I I I 1 I I Chip enable. E allows access for read and write registers. If is high, I I 00-07 are in hiqh impedance unless is low. i 4i RE I I I Write enable, When active (low) indicates to the device that data is I I I I I I I I I I I I An active (high) state indicates to the device that a read is1 I I 5 I DBIN I I I about to be carried out by the MPU. I I I I I I I I I I I I being written to one of its registers. I I Data bus in. i 6 i RSO i I i Register select lines. Determine which register is addressed by the