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本文(DLA SMD-5962-87521 REV C-2008 MICROCIRCUIT DIGITAL CMOS 16-KEY KEYBOARD ENCODER MONOLITHIC SILICON.pdf)为本站会员(towelfact221)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-87521 REV C-2008 MICROCIRCUIT DIGITAL CMOS 16-KEY KEYBOARD ENCODER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical changes to table I. Editorial changes throughout. mbk 91-01-29 Michael M. Frye B Update boilerplate to MIL-PRF-38535 requirements. LTG 01-07-17 Thomas M. Hess C Update boilerplate to MIL-PRF-38535 requirements. LTG 08-04-16 Thomas M. He

2、ss REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Greg A. Pitz DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FO

3、R USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, CMOS, 16-KEY KEYBOARD ENCODER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-04-08 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-87521 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E303

4、-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes dev

5、ice requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87521 01 V A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2)

6、Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54C922 16-key keyboard encoder with three-state output 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:

7、Outline letter Descriptive designator Terminals Package style V GDIP1-T18 or CDIP2-T18 18 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) 3.0 V dc to + 18.0 V dc Voltage at any pin VCC0.3 V to V

8、CC+0.3 V Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering, 10 seconds). +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (V

9、CC) 5.0 V dc to 15.0 V dc Case operating temperature range (TC) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction

10、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following s

11、pecification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, Genera

12、l Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Dra

13、wings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between th

14、e text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shal

15、l be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification

16、 to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These mod

17、ifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dime

18、nsions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth

19、table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4. 3.3 Electrical performance characteristics. Unle

20、ss otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests

21、for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Ma

22、rking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

23、has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in a

24、ccordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted

25、to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be prov

26、ided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufact

27、urers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY

28、 CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max VCC= 5.0 V 4.5 CMOS inputs VCC= 10 V 9.0 IO= -10 A VCC

29、= 15.0 V 13.5 High level output voltage TTL inputs VOHIO= -360 A VCC= 4.5 V 1, 2, 3 2.4 V VCC= 5.0 V 0.5 CMOS inputs VCC= 10.0 V 1.0 IO= +10 A VCC= 15.0 V 1.5 Low level output voltage TTL inputs VOLIO= +360 A VCC= 4.5 V 1, 2, 3 0.4 V VCC= 5.0 V 3.5 CMOS inputs VCC= 10.0 V 8.0 VCC= 15.0 V 12.5 High l

30、evel input voltage (except OSC and KBM inputs) TTL inputs VIH VCC= 4.5 V 1, 2, 3 3.0 V VCC= 5.0 V 1.5 CMOS inputs VCC= 10.0 V 2.0 VCC= 15.0 V 2.5 Low level input voltage (except OSC and KBM inputs) TTL inputs VIL VCC= 4.5 V 1, 2, 3 0.8 V Input capacitance, pins 1- 4 and pins 7-18 CIN1See 4.3.1c 4 10

31、.0 pF Input capacitance, pins 5 and 6 CIN2See 4.3.1c 4 12.5 pF VCC= 5.0 V 1.1 VCC= 10.0 V 1.9 Supply current OSC at 0 V, (one Y low) ICCOSC = 0.0 V VCC= 15.0 V 1, 2, 3 2.6 mA VOUT= 0.0 V VCC= 15.0 V -3.0 Three-state output leakage current IOZVOUT= 15.0 V VCC= 15.0 V 1, 2, 3 3.0 A See footnotes at en

32、d of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance charac

33、teristics - Continued. Test Symbol Test conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max IIN= 0.7 mA VCC= 5.0 V 3.0 4.3 IIN= 1.4 mA VCC= 10.0 V 6.0 8.6 Positive-going threshold voltage at OSC and KBM inputs VT+IIN= 2.1 mA VCC= 15.0 V 1, 2, 3 9.0 12.9 V IIN= 0

34、.7 mA VCC= 5.0 V 0.7 2.0 IIN= 1.4 mA VCC= 10.0 V 1.4 4.0 Negative-going threshold voltage at 0sc and KBM inputs VT-IIN= 2.1 mA VCC= 15.0 V 1, 2, 3 2.1 6.0 V VIN= 0.5 V VCC= 5.0 V -5.0 VIN= 1.0 V VCC= 10.0 V -25.0 Row pull-up current at Y1, Y2, Y3, Y4 and Y5 inputs IRP VIN= 1.5 V VCC= 15.0 V 1, 2, 3

35、-55.0 A VIN= 0.5 V VCC= 5.0 V 1400 VIN= 1.0 V VCC= 10.0 V 700 Column ON resistance at X1, X2, X3, and X4 inputs RONVIN= 1.5 V VCC= 15.0 V 1, 2, 3 500 Logical “1” input current at output enable IIHVIN= 15.0 V VCC= 15.0 V 1, 2, 3 1.0 A Logical “0” input current at output enable IILVIN= 0.0 V VCC= 15.0

36、 V 1, 2, 3 -1.0 A VCC= 5.0 V -1.75 Output source current (P-channel) ISOURCEVOUT= 0.0 V VCC= 10.0 V 1 -8.0 mA VOUT= VCC= 5.0 V 1.75 Output sink current (N-channel) ISINKVOUT= VCC= 10.0 V 1 8.0 mA Functional tests See 4.3.1d 7, 8 VCC= 5.0 V 1.0 200.0 VCC= 10.0 V 1/ 190.0 VCC= 15.0 V 1/ 9 110.0 VCC= 5

37、.0 V 1/ 345.0 VCC= 10.0 V 1/ 10 265.0 VCC= 5.0 V 1/ 195.0 Propagation delay time, from logical “1” or logical “0” into high impedance state t1H, t0H CL= 50 pF RL= 10 k See figure 4 VCC= 10.0 V 1/ 11 150.0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking pe

38、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C Group A

39、subgroups Limits Unit unless otherwise specified Min Max VCC= 5.0 V 1.0 250.0 VCC= 10.0 V 1/ 125.0 VCC= 15.0 V 1/ 9 90.0 VCC= 5.0 V 1/ 350.0 VCC= 10.0 V 1/ 10 175.0 VCC= 5.0 V 1/ 200.0 Propagation delay time, from high impedance state to a logical “1” or logical “0” tH0,tH1CL= 50 pF RL= 10 k See fig

40、ure 4 VCC= 10.0 V 1/ 11 100.0 ns VCC= 5.0 V 10.0 150.0 VCC= 10.0 V 1/ 80.0 VCC= 15.0 V 1/ 9 60.0 VCC= 5.0 V 1/ 210.0 VCC= 10.0 V 1/ 10 110.0 VCC= 5.0 V 1/ 120.0 Propagation delay time, to logical “1” or logical “0” from D.A. tpd0, tpd1 CL= 50 pF See figure 4 VCC= 10.0 V 1/ 11 65.0 ns 1/ Propagation

41、delay time, if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8

42、DSCC FORM 2234 APR 97 Device type 01 Case outline V Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Row Y1 Row Y2 Row Y3 Row Y4 Oscillator (OSC) Keybounce mask (KBM) Column X4 Column X3 GND Column X2 Column X1 Data available Output enable Data out D Data out C Data out B

43、 Data out A VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 Swi

44、tch Position 0 Y1,X1 1 Y1,X2 2 Y1,X3 3 Y1,X4 4 Y2,X1 5 Y2,X2 6 Y2,X3 7 Y2,X4 8 Y3,X1 9 Y3,X2 10 Y3,X3 11 Y3,X4 A 0 1 0 1 0 1 0 1 0 1 0 1 B 0 0 1 1 0 0 1 1 0 0 1 1 C 0 0 0 0 1 1 1 1 0 0 0 0 Data out D 0 0 0 0 0 0 0 0 1 1 1 1 Switch Position 12 Y4,X1 13 Y4,X2 14 Y4,X3 15 Y4,X4 A 0 1 0 1 B 0 0 1 1 C 1

45、1 1 1 Data out D 1 1 1 1 FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 1

46、0 DSCC FORM 2234 APR 97 NOTES: T1 = T2 = RC T3 = 0.7 RC Where R = 10k and C is external at KBM input. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87521 DEFE

47、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004

48、 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring acti

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