1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Changes in accordance with NOR 5962-R008-91. 91-10-17 Michael. A. Frye B Changes in accordance with NOR 5962-R217-93. 93-08-20 Michael. A. Frye C Updated boilerplate. Removed programming specifics from drawing, including table III. Separated source bulletin
2、 from body of drawing. - glg 00-08-30 Raymond Monnin D Corrected page number count on front page. Updated boilerplate. ksr. 04-11-30 Raymond Monnin E 5 year review and update. Changed input and output capacitance from 6 pF to 10 pF and 8 pF to 10 pF respectively. ksr 06-06-12 Raymond Monnin THE ORIG
3、INAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY James E. Jamison DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 h
4、ttp:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Michael. A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 1988 Sep. 22 MICROCIRCUIT, DIGITAL, CMOS, 2K X 8 REGISTERED UVEPROM, MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 6
5、7268 5962-87529 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E484-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87529 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FO
6、RM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-87529 01
7、L X | | | | | | | | | | | | Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit Access time 01 1/ 2K x 8-registered UVEPROM 45 ns 02 1/ 2K x
8、 8-registered UVEPROM 35 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style 2/ K GDFP2-F24 or CDFP3-F24 24 flat package L GDIP3-T24 or CDIP4-T24 24 dual-in-line package 3 CQCC1-N28 28 squ
9、are chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 3/ Supply voltage range. -0.5 V dc to +7.0 V dc DC voltage applied to outputs in high Z state -0.5 to +7.0 V dc DC program voltage 14.0 V DC input voltage range . -
10、3.0 V dc to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD): 4/. 1.0 W Lead temperature (soldering, 10 seconds) . +300C Junction temperature (TJ) 5/. +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Endurance . 25 cycles/byte (minimum) Data retentio
11、n 10 years minimum 1.4 Recommended operating conditions. Case operating temperature range (TC). -55C to +125C Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be lis
12、ted in MIL-HDBK-103. 2/ Lid shall be transparent to permit ultraviolet erasure. 3/ Unless otherwise specified, all voltages are referenced to ground. 4/ Must withstand the added PDdue to short-circuit test; e.g., IOS. 5/ Maximum junction temperature may be increased to +175C during burn-in and stead
13、y-state life. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87529 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Governme
14、nt specification, standards, and handbooks. The following specification, standards and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION
15、MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Micro
16、circuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2
17、Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMEN
18、TS 3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or
19、a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) pla
20、n may make modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The d
21、esign, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outl
22、ines shall be in accordance with 1.2.2 herein. 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be specified by an altered
23、 item drawing. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shal
24、l be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87529 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4
25、3218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test |Symbol | Conditions | Group A |Device | Limits | | | -55C TC +125C |subgroups | type | |Unit | | 4.5 V VCC 5.5 V | | | Min | Max | | | unless otherwise specified | | | | | Input leakage cu
26、rrent |IIX|VIN= 5.5 V and GND | 1, 2, 3 | All | -10 | 10 | A | | | | | | Output leakage current 1/ |ILO|VOUT= 5.5 V and GND | 1, 2, 3 | All | | +40 | A | |output disabled | | | | | Operating supply current |ICC|E/ES=VIL, INIT = VIH, | 1, 2, 3 | All | | 120 | mA | |addresses cycling between | | | | |
27、 | |0 V and 3.0 V, f = 1/2tPWC | | | | | Input high voltage 2/ |VIH|VCC= 4.5 V and 5.5 V | 1, 2, 3 | All | 2.0 | | V | | | | | | Input low voltage 2/ |VIL| VCC= 4.5 V and 5.5 V | 1, 2, 3 | All | | 0.8 | V | | | | | | | High level output voltage |VOH|VIL= 0.8 V, VIH= 2.0 V | 1, 2, 3 | All | 2.4 | | V
28、 | |IOH= -4.0 mA, VCC= 4.5 V | | | | | | | | | | | Low level output voltage |VOL|VIL= 0.8 V, VIH= 2.0 V | 1, 2, 3 | All | | 0.4 | V | |IOL= 16 mA, VCC= 4.5 V. | | | | | | | | | | | | Output short-circuit | | | | | | | current 3/ 4/ |IOS|VO= GND | 1, 2, 3 | All |-20 |-125 | mA | | | | | | Input capac
29、itance 4/ |CIN| VCC= 5.5.V | VIN= 0 V | | All | | 10 | | | TC= +25C | | 4 | | | | pF Output capacitance 4/ |COUT| see 4.3.1d | VOUT= 0 V | | | | 10 | | f = 1.0 MHz | | | | | | | | | | | | | Address setup to clock |tSA|See figures 3 and 4 | 9, 10, 11 | 01 | 45 | | ns high | |as applicable | | 02 | 35
30、 | | | | | | | | | | | | | | | | Address hold from clock |tHA| | 9, 10, 11 | All | 0 | | ns | | | | | | Clock high to valid output |tCO| | 9, 10, 11 | 01 | | 25 | ns | | | | 02 | | 15 | | | | | | | | Clock pulse width 4/ |tPWC| | 9, 10, 11 | All | 20 | | ns | | | | | | Valid output from clock |tCOS|
31、 | 9, 10, 11 | 01 | | 30 | ns high 4/ 5/ | | | | 02 | | 20 | | | | | | | | See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87529 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43
32、218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test |Symbol | Conditions | Group A |Device | Limits | | | -55C TC +125C |subgroups | type | |Unit | | 4.5 V VCC 5.5 V | | | Min | Max | | | unless otherwise specified | | | | | ESsetup to clock
33、high | | See figures 3 and 4 | | | | | 4/ |tSES| as applicable | 9, 10, 11 | All | 15 | | ns | | | | | | | EShold from clock high | | | | | | | 4/ |tHES| | 9, 10, 11 | All | 5 | | ns | | | | | | | Delay from INIT to valid |tDI| | 9, 10, 11 | 01 | | 35 | ns output 4/ | | | | 02 | | 20 | | | | | | | |
34、 INIT recovery to clock | | | | | | | high 4/ |tRI| | 9, 10, 11 | All | 20 | | ns | | | | | | | INIT pulse width 4/ | | | | | | | |tPWI| | 9, 10, 11 | 01 | 25 | | ns | | | | 02 | 20 | | | | | | | | | Inactive output from clock |tHZC| | 9, 10, 11 | 01 | | 30 | ns high 4/ 5/ 6/ | | | | 02 | | 20 | | |
35、 | | | | Valid output from E low |tDOE| | 9, 10, 11 | 01 | | 30 | ns 4/ 7/ | | | | 02 | | 20 | | | | | | | | Inactive output from E |tHZE| | 9, 10, 11 | 01 | | 30 | ns high 4/ 6/ 7/ | | | | 02 | | 20 | | | | | | | | 1/ For devices using the synchronous enable, the device must be clocked after applyi
36、ng these voltages to perform this measurement. 2/ These are absolute voltages with respect to device ground pin and include all overshoots due to system or tester noise. 3/ For test purposes, not more than one output at a time should be shorted. Short-circuit test duration should not exceed 30 secon
37、ds. 4/ This parameter tested initially and after any design or process changes which could affect this parameter, therefore, shall be guaranteed to the limits specified in table I. 5/ Applies only when the synchronous ESfunction is used. 6/ Transition is measured at steady-state high level -500 mV o
38、r stead-state low level +500 mV on the output from the 1.5 V level on the input with loads shown on figure 3B. 7/ Applies only when the asynchronous E function is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ
39、E A 5962-87529 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also b
40、e marked. For packages where the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL
41、-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be
42、 listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3
43、.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3
44、.9 Verification and review. DSCC, DSCCs agent and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing EPROMS. All testing requirement
45、s and quality assurance provisions herein, shall be satisfied by the manufacturer prior to delivery. 3.10.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified by the manufacturer. 3.10.2 Programmability of EPROMS. When specified
46、, devices shall be programmed to the specified pattern using the procedures and characteristics specified by the manufacturer. 3.10.3 Verification of programmed or erased EPROMs. When specified, devices shall be verified as either programmed to a specified program, or erased. As a minimum, verificat
47、ion shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor spec
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