DLA SMD-5962-87595 REV C-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL BUS TRANSCEIVER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical changes in table I. Editorial changes throughout. 89-09-12 W. Heckman B Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 01-09-25 Raymond Monnin C Update drawing to current requirements. Ed

2、itorial changes throughout. - gap 09-02-06 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD

3、 MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, BUS TRANSCEIVER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING A

4、PPROVAL DATE 87-07-27 MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-87595 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E366-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFE

5、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Numb

6、er (PIN). The complete PIN is as shown in the following example: 5962-87595 01 K X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54

7、AS646 Octal bus transceiver and register with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or GDFP3-F24 24 Flat L GDIP3-T24 or GDIP4-T24 24 Dual-in-line 3 CQC

8、C1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (VCC) -0.5 V dc to +7.0 V dc Input voltage: Control inputs . -1.2 V at -18 mA to +7.0 V dc I/O ports . -1.2 V at -18 mA to +5.5 V dc St

9、orage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ . 1.16 W Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to

10、5.5 V dc Minimum high level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Case operating temperature range (TC) -55C to +125C Width of clock pulse (tW) . 7 ns minimum Setup time before clock (ts) . 7 ns minimum Hold time after clock (th) . 0 ns minimum Maximum clock frequen

11、cy (fMAX) . 75 MHz _ 1/ Must withstand the added PDdue to short circuit test (e.g. IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION

12、 LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those

13、 cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Out

14、lines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue,

15、Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific

16、exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QM

17、L) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as do

18、cumented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38

19、535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 h

20、erein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit

21、and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test require

22、ments. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEF

23、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For pack

24、ages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38

25、535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed

26、 as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Cert

27、ificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Veri

28、fication and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling

29、 and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in

30、test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, bias

31、es, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional a

32、t the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Ele

33、ctrical performance characteristics. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max Input clamp voltage VI C VCC= 4.5 V, IIN= -18 mA 1 -1.2 V Low level output voltage VOLVCC= 4.5 V, IOL= 32 mA 1, 2, 3 0.5 V High level output voltage VOHVCC= 4.5 V

34、 to 5.5 V, IOH= -2 mA 1, 2, 3 2.5 V CC= 4.5 V IOH= -3 mA 1, 2, 3 2.4 V OH= -12 mA 1, 2, 3 2.0 V Low level input current IILControl inputs 1, 2, 3 -0.5 mA VCC= 5.5 V, VIN= 0.4 V A or B ports 1/ 1, 2, 3 -0.75 mA High level input current II H1 Control inputs 1, 2, 3 20 A VCC= 5.5 V, VIN= 2.7 V A or B p

35、orts 1/ 1, 2, 3 70 A II H2 VCC= 5.5 V Control inputs 1, 2, 3 0.1 mA A or B ports 1, 2, 3 0.1 mA Output current IOVCC= 5.5 V, VO= 2.25 V 2/ 1, 2, 3 -30 -112 mA Supply current ICCH VCC= 5.5 V, outputs high 1, 2, 3 195 mA ICCL VCC= 5.5 V, outputs low 1, 2, 3 211 mA CCZ VCC= 5.5 V, outputs disabled 1, 2

36、, 3 211 mA Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET

37、 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C Group A subgroupsLimits Unit unless otherwise specified Min Max Propagation delay time, CBA or CAB to A or B tPLH1 9, 10, 11 2 9.5 ns tPHL1 9, 10, 11 2 10 ns Propagation delay ti

38、me, A or B to B or A tPLH2 9, 10, 11 2 11.5 ns tPHL2 VCC= 4.5 V to 5.5 V CL= 50 pF 10% R1= 500 5% R2= 500 5% (See figure 4) 9, 10, 11 1 8 ns Propagation delay time, SBA or SAB to A or B 3/ tPLH3 9, 10, 11 2 13.5 ns tPHL3 9, 10, 11 2 11 ns Propagation delay time, enable time, G to A or B tPZH1 9, 10,

39、 11 2 11 ns tPZL1 9, 10, 11 3 15 ns Propagation delay time, disable time, G to A or B tPHZ1 9, 10, 11 2 11 ns tPLZ1 9, 10, 11 2 11 ns Propagation delay time, enable time, DIR to A or B tPZH2 9, 10, 11 3 21 ns tPZL2 9, 10, 11 3 24 ns Propagation delay time, disable time, DIR to A or B tPHZ2 9, 10, 11

40、 2 12 ns tPLZ2 9, 10, 11 2 12 ns 1/ For I/O ports, the low level input current, IIL, and high level input current, IIH, include the off-state output current. 2/ The output conditions have been chosen to produce a current that closely approximates on-half of the true short-circuit output current, IOS

41、. 3/ These tests are performed with the internal output state of the storage register opposite to that of the bus input. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENTER COLUMBUS CO

42、LUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines L and K 3 Terminal number Terminal symbol Terminal symbol 1 CAB NC 2 SAB CAB 3 DIR SAB 4 A1 DIR 5 A2 A1 6 A3 A2 7 A4 A3 8 A5 NC 9 A6 A4 10 A7 A5 11 A8 A6 12 GND A7 13 B8 A8 14 B7 GND 15 B6 NC16 B5 B8

43、17 B4 B7 18 B3 B6 19 B2 B5 20 B1 B4 21 G B3 22 SBA NC 23 CBA B2 24 VCCB1 25 G 26 SBA 27 CBA 28 VCC NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFE

44、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Inputs Data I/O Operation or function G DIR CAB CBA SAB SBA A1 through A8 B1 through B8 X X X X X Input Unspecified Store A, B unspecified X X X X X Unspecified Input Store B, A unspecified H X X X St

45、ore A, B data H X H/L H/L X X Input Input Isolation, hold storage L L X X X L Real-time B data to A bus L L X H/L X H Output Input Stored B data to A bus L H X X L X Real-time A data to B bus L H H/L X H X Input Output Stored A data to B bus The data output functions may be enabled or disabled by va

46、rious signals at the G and DIR inputs. Date input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. H = High voltage level L = Low voltage level = Low-to-high transition X = Irelevant H/L = High or low voltage level FIGURE 2.

47、 Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by

48、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87595 DEFENSE SUPPLY CENT