DLA SMD-5962-87621 REV B-2011 MICROCIRCUITS DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL 8-BIT BINARY COUNTER WITH INPUT REGISTERS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 05-02-03 Raymond Monnin B Update drawing as part of 5 year review. - jt 11-08-16 C. SAFFLE THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED.

2、 REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Monica L. Grosel DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND

3、AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY N. A. Hauck MICROCIRCUITS, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, 8-BIT BINARY COUNTER WITH INPUT REGISTERS, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-10-14 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87621 SHE

4、ET 1 OF 10 DSCC FORM 2233 APR 97 5962-E235-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1

5、Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87621 01 E X Drawing number Device type (se

6、e 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LS592 8-bit binary counter with input registers 1.2.2 Case outlines. The case outlines are as designated in MI

7、L-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum

8、ratings. Supply voltage range . -0.5 V dc to +7.0 V dc Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 330 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835

9、 Junction temperature (TJ) +175C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-876

10、21 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5 V dc High level input voltage (VIH) 2.0 V dc minimum Low level input voltage (VIL) . 0.7 V dc maximum High level output curre

11、nt, RCO (IOH) . -1.0 mA maximum Low level output current RCO (IOL) . 8.0 mA maximum Counter clock frequency (fCCK) 0.0 MHz to 20.0 MHz Counter clock pulse width (twCCK ) . 25 ns minimum Counter clear pulse width (tW CCLR) . 20 ns minimum Register clock pulse width (tWRCK ) 20 ns minimum Counter load

12、 pulse width (tW CLOAD) . 40 ns minimum Setup time (t su): CCKEN low before CCK . 30 ns minimum CCLRinactive before CCK . 20 ns minimum CLOADinactive before CCK 20 ns minimum RCK before CLOAD2/ 30 ns minimum Data A thru H before RCK . 20 ns minimum Hold time (t h) 0 ns minimum Case operating tempera

13、ture range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited

14、in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.

15、DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Buildi

16、ng 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exempt

17、ion has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirement

18、s. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has

19、 been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modificatio

20、ns to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2

21、 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall

22、 be as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2. 3.2.4 Operating sequence. The operating sequence shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance charac

23、teristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking

24、 shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option

25、 of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with

26、 MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land an

27、d Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be

28、provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the ac

29、quiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND

30、ARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max

31、 High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, 1, 2, 3 All 2.4 V IOH= -1.0 mA, VIL= 0.7 V Low level output voltage VOLVCC= 4.5 V, VIH= 2.0 V, IOL= 8.0 mA, VIL= 0.7 V 1, 2, 3 All 0.4 V Input clamp voltage VI CVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.5 V High level input current IIHVCC= 5.5 V, VI

32、N= 2.7 V 1, 2, 3 All 20 A Low level input current IILVCC= 5.5 V, A thru H 1, 2, 3 All -0.4 mA VIL= 0.4 V All others -0.2 CCK -0.8 Input current at maximum input voltage IIVCC= 5.5 V, VI= 7.0 V 1, 2, 3 All 100 A Short circuit output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 All -20 -100 mA Supply

33、 current ICCHVCC= 5.5 V, All possible inputs 1, 2, 3 All 60 mA ICCL grounded, All outputs open 60 Functional tests See 4.3.1C 7 All Maximum clock frequency fMAXVCC= 5.0 V, RL= 1 k 5%, 9 All 20 MHz CL= =30 pF 10% 10, 11 12 Propagation delay time, CCK to RCO tPLH1VCC= 5.0 V, 9 All 23 ns 10, 11 32.2 tP

34、HL1CL= 30 pF 10%, 9 30 10, 11 42 Propagation delay time, CLOAD to RCO tPLH2RL= 1 k 5%, 9 All 47 ns 10, 11 65.8 tPHL29 41 10, 11 57.4 Propagation delay time, CCLRto RCO tPLH39 All 45 ns 10, 11 63 Propagation delay time, RCK to RCO tPLH4CLOAD= Low 9 All 53 ns 10, 11 74.2 tPHL49 45 10, 11 63 1/ Not mor

35、e than one output should be shorted at a time and the duration of the short circuit condition should not exceed one second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS

36、, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol Terminal symbol 1 B NC 2 C B 3 D C 4 E D 5 F E 6 G NC 7 H F 8 GND G 9 RCO H 10 CCLRGND 11 CCK NC 12 CCKEN RCO 13 RCK CCLR14 CLOADCCK 15 A CCKEN 16 VCCNC 17 - - - RC

37、K 18 - - - CLOAD19 - - - A 20 - - - VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM

38、2234 APR 97 FIGURE 2. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Operating se

39、quence. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampli

40、ng and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-i

41、n test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, bi

42、ases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional

43、 at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) 1 Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test require

44、ments (method 5005) 1, 2, 3, 7, 9, 10, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspectio

45、n shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall b

46、e omitted. c. Subgroups 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87621 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 D

47、SCC FORM 2234 APR 97 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under docume

48、nt revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACKAGING 5.1 Packaging requirements. The requirements f