DLA SMD-5962-87629 REV E-2010 MICROCIRCUIT DIGITAL FAST CMOS NONINVERTING OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE number 9Z527. Pages 4 and 5: Changes in electrical table. Editorial changes throughout. 88-04-06 M. A. Frye B Add vendor CAGE 95569 for device type 01. Add device type 02. Delete vendor CAGE 9Z527. Add case outline S for device ty

2、pes 01 and 02. Editorial changes throughout. 89-04-11 M. A. Frye C Add vendor CAGE 9Z527 for device type 01. Add vendor CAGE 27014 for device type 01. Add vendor CAGE 75569 for device type 02. Technical changes in table I. Editorial changes throughout. 89-12-07 M. A. Frye D Update boilerplate change

3、s to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 03-08-26 Thomas M. Hess E Correct test condition for total supply current (ICCT) and add footnote 5/ in table I. Update boilerplate paragraphs as specified in current requirements of MIL-PRF-38535. MAA. 10-01-25 Thomas M. Hess REV SH

4、ET REV SHET REV STATUS REV E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking THIS DRAWING IS AVAILABLE FOR U

5、SE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, NONINVERTING OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICONDRAWING APPROVAL DATE 87-11-06 AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-87629 SHEE

6、T 1 OF 12 DSCC FORM 2233 APR 97 5962-E129-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. S

7、COPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87629 01 R A Drawing number Device

8、 type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT245 Non-inverting octal bus transceiver with three-state outputs, TTL compatible inputs 02 54FCT245A

9、Non-inverting octal bus transceiver with three-state outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20

10、or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range . -0.5 V dc to +6.0 V dc Input voltage range -0.5 V dc to VCC+ 0.5 V dc Output voltage range -0.

11、5 V dc to VCC+ 0.5 V dc I/O voltage range -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . -20 mA DC output diode current (IOK) . -50 mA DC output current . 100 mA Maximum power dissipation (PD) 2/ 500 mW Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Storage temperature range

12、 -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH) . 2.0 V dc Case operating te

13、mperature range (TC) . -55C to +125C 1/ All voltages referenced to GND. 2/ Must withstand the added PDdue to short circuit test, e.g.; IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY

14、 CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise

15、 specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835

16、- Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standa

17、rdization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes

18、 applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that

19、is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in

20、 accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QM

21、L“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s).

22、The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5

23、Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case o

24、perating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test re

25、quirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addit

26、ion, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked o

27、n all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shal

28、l be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-

29、38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be requ

30、ired in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the revi

31、ewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characterist

32、ics. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOH= -300 A 1, 2, 3 All 4.3 V IOH= -12 mA 1, 2, 3 All 2.4 Low level output voltage (port A) VOL1VCC= 4

33、.5 V VIL= 0.8 V VIH= 2.0 V IOL= +300 A 1, 2, 3 All 0.2 V IOL= +48 mA 1, 2, 3 All 0.55 Low level output voltage (port B) VOL2VCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOL= +300 A 1, 2, 3 All 0.2 V IOL= +48 mA 1, 2, 3 All 0.55 Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1 All -1.2 V High level input current

34、 IIH1VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 5.0 A High level input current for common I/O pins IIH2VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 20 A Low level input current IIL1VCC= 5.5 V, VIN= GND 1, 2, 3 All -5.0 A Low level input current for common I/O pins IIL2VCC= 5.5 V, VIN= GND 1, 2, 3 All -20 A Short circ

35、uit output current IOS 1/ VCC= 5.5 V 1, 2, 3 All -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V VCC= 5.5 V, fi= 0 MHz 1, 2, 3 All 1.5 mA Quiescent power supply current (TTL inputs) ICC 2/ VCC= 5.5 V VIN= 3.4 V 1, 2, 3 All 2.0 mA Dynamic power supply current ICCD 3/ VC

36、C= 5.5 V Outputs open T/Rnull= VCCOne bit toggling 50% duty cycle VIN 5.3 V or VIN 0.2 V OEnullnullnullnull= GND All 0.4 mA/MHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8

37、7629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Group A subgroups Device type Limits Unit Min Max T

38、otal power supply current ICC 4/ 5/ VCC= 5.5 V Outputs open T/Rnull= OEnullnullnullnull= GND One bit toggling 50% duty cycle VIN 5.3 V or VIN 0.2 V fi= 10 MHz 1, 2, 3 All 5.5 mA VCC= 5.5 V Outputs open T/Rnull= OEnullnullnullnull= GND Eight bits toggling 50% duty cycle VIN= 3.4 V or VIN= GND fi= 2.5

39、 MHz 1, 2, 3 All 6.0 mA Input capacitance CINSee 4.3.1c 4 All 10 pF I/O capacitance CI/OSee 4.3.1c 4 All 12 pF Functional tests See 4.3.1d 7, 8 All Propagation delay time, inputs to outputs tPLH, tPHLCL= 50 pF RL= 500 See figure 4 6/ 9, 10, 11 01 1.5 7.5 ns 9, 10, 11 02 1.5 4.9 Output enable time, O

40、Enullnullnullnullto Anor BntPZH, tPZL9, 10, 11 01 1.5 10.0 ns 9, 10, 11 02 1.5 6.5 Output disable time, OEnullnullnullnullto Anor BntPHZ, tPLZ9, 10, 11 01 1.5 10.0 ns 9, 10, 11 02 1.5 6.0 1/ Not more than one output should be shorted at one time, and the duration of the short circuit condition shoul

41、d not exceed one second. 2/ TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ ICC= ICCQ+ (ICCx DHx NT) + (ICCDx fIx NI) Where: DH= Duty cycle for TTL inputs high. NT= Number of TTL i

42、nputs at DH. fi= Input frequency in MHz. NI= Number of inputs at fI. 5/ For total current supply (ICCT) test in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account, as its effect is not intended to be included in the test results

43、. The impact must be characterized and appropriate offset factors must be applied to the test result. 6/ The minimum limits are guaranteed, if not tested, to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

44、DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 T/RnullA0A1A2A3A4A5A6A7GND B7B6B5B4B3B

45、2B1B0OEnullnullnullnullVCCFIGURE 1. Terminal connections. Device types 01 and 02 Inputs Outputs OEnullnullnullnullT/R L L Bus B data to bus A L H Bus A data to bus B H X Z L = Low voltage level H = High voltage level X = Irrelevant Z = High impedance state FIGURE 2. Truth table. Provided by IHSNot f

46、or ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 Device types 01 and 02 FIGURE 3. Logic diagram. Provided by IHSNot for

47、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 Device types 01 and 02 NOTES: 1. Diagram shown for input control enable

48、low and input control disable high. 2. Pulse generator for all pulses: tf 2.5 ns, tr 2.5 ns. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87629 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 Switch position Test Switch tPLZtPZLAll other Closed Clos