DLA SMD-5962-87641 REV A-2008 MICROCIRCUIT LINEAR BIMOS 8-BIT SERIAL INPUT LATCHED DRIVER MONOLITHIC SILICON《单片硅锁存驱动器 串行输入BIMOS 8位的线性微电子电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. - drw 08-07-23 Robert M. Heber THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PRE

2、PARED BY Joseph A. Kerby CHECKED BY Ray Monnin DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DAT

3、E 88-03-17 MICROCIRCUIT, LINEAR, BIMOS 8-BIT, SERIAL INPUT, LATCHED DRIVER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-87641 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E445-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

4、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with M

5、IL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87641 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identifies the circuit function as follows:

6、 Device type Generic number Circuit function 01 UCS-5822 8-bit, serial input, latched driver, 80 V output 1.2.2 Case outline. The case outline is as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lea

7、d finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Output voltage (VOUT). 80 V dc Supply voltage range (VDD) 18 V dc Input voltage range -0.3 V dc to VDD+ 0.3 V dc Continuous output current (IOUT) 500 mA Storage temperature range -65C to +150C Maxim

8、um power dissipation (PD) at TA= +25C 1.2 W Maximum power dissipation (PD) at TC= +25C 5.25 W Thermal resistance, junction-to-ambient (JA) 90C/W Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Junction temperature (TJ) +150C Lead temperature (soldering, 10 seconds) +260C 1.4 Recommended

9、operating conditions. Supply voltage (VDD) 5 V dc Ambient operating temperature range (TA) -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432

10、18-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these doc

11、uments are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Co

12、mponent Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700

13、Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations un

14、less a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufact

15、urer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. Thi

16、s QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance

17、 with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordanc

18、e with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Functional diagram. The logic diagram shall be as specified on figure 2. 3.2.4 Truth table. The truth table shall be as specified on figure 3. 3.2.5 Timing diagram. The timing diagram s

19、hall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical

20、test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN

21、may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

22、ICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C VSS= 0 V Group A subgroupsDevice type Limits Unit unless otherwise speci

23、fied Min Max Output leakage current ICEXVOUT= 80 V, VDD= 5 V 1, 3 All 50 A 2 500 Collector-emitter saturation voltage VCE(SAT) IOUT= 100 mA, VDD= 5 V 1 All 1.1 V OUT= 200 mA, VDD= 5 V 1.3 IOUT= 350 mA, VDD= 7 V 1.6 OUT= 100 mA, VDD= 5 V 1/ 2, 3 1.3 IOUT= 200 mA, VDD= 5 V 1/ 1.5 OUT= 350 mA, VDD= 7 V

24、 1/ 1.8 Input voltage LOW VIN(0) VDD= 5 V 4, 5, 6 All 0.8 V Input voltage HIGH VIN(1) VDD= 12 V 2/ 4, 5, 6 All 10.5 V DD= 5 V 2/ 3.5 Input resistance RINVDD= 12 V 1, 2 All 50 k VDD= 10 V 50 DD= 5 V 50 VDD= 12 V 3 35 DD= 10 V 35 VDD= 5 V 35 See footnotes at end of table. Provided by IHSNot for Resale

25、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics continued. Test Symbol Conditio

26、ns -55C TA +125C VSS= 0 V Group A subgroupsDevice type Limits Unit unless otherwise specified Min Max Supply current “ON” IDD(ON) One driver ON VSTROBE= VDDVDD= 12 V 1, 2 All 4.5 mA DD= 10 V 3.9 VDD= 5 V 2.4 DD= 12 V 3 5.5 VDD= 10 V 4.5 DD= 5 V 3.0 Supply current “OFF” IDD(OFF) All drivers OFF All i

27、nputs = 0 V VDD= 12 V 1, 2 All 2.9 mA VENABLE= VSTROBE= VDDVDD= 5 V 1.6 DD= 12 V 3 3.5 VDD= 5 V 2.0 Minimum data active time before clock pulse (data set-up time) tSVDD= 5 V, see figure 4 4 All 75 ns Minimum data active time after clock pulse (data hold time) tHVDD= 5 V, see figure 4 4 All 75 ns Min

28、imum data pulse width tDPWVDD= 5 V, see figure 4 4 All 150 ns Minimum clock pulse-size width tCPWVDD= 5 V, see figure 4 4 All 150 ns Minimum time between clock activation and strobe tC-SVDD= 5 V, see figure 4 4 All 300 ns Minimum strobe pulse width tSPWVDD= 5 V, see figure 4 4 All 100 ns 1/ Pulse te

29、st when performed at TA= -55C, subgroup 3. 2/ Operation of these devices with standard TTL or DTL may require the use of appropriate pull up resistors to ensure an input-logic high. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI

30、T DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline E Terminal number Terminal symbol 1 CLOCK 2 SERIAL DATA IN 3 VSS4 VDD5 SERIAL DATA OUT 6 STROBE 7 OUTPUT ENABLE 8 GROUND 9 OUT810 OUT711 OUT

31、612 OUT513 OUT414 OUT315 OUT216 OUT1FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC

32、 FORM 2234 APR 97 FIGURE 2. Functional diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Sh

33、ift register contents Latch contents Output contents Serial data input Clock input I1I2I3.I8Serial data output Strobe input I1I2I3.I8Output enable I1I2I3.I8H H R1R2.R7R7L L R1R2R7R7X R1R2R3R8R8X X XX X L R1R2R3R8P1P2P3X P8H P1P2P3P8L P1P2P3P8X X XX H H H HH L = Low logic level H = High logic level X

34、 = Irrelevant P = Present state R = Previous state SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA

35、 must appear at the input prior to the rising edge of the CLOCK input waveform. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applica

36、tions where the latches are bypassed (strobe tied high) will require that ENABLE input be high during serial data entry. When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting the information stored in the latches or shift register. With the ENABLE input low, t

37、he outputs are controlled by the state of the latches. FIGURE 3. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SH

38、EET 9 DSCC FORM 2234 APR 97 NOTE: Typical time between strobe activation and output transition (VDD= 5.0 V) is 1.0 s. FIGURE 4. Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87641 DEFENSE SU

39、PPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with

40、a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). Th

41、e certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in M

42、IL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity re

43、tain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

44、 appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. T

45、he test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the inte

46、nt specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspect

47、ion. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 7, 8, 9, 10, and 11 in tabl

48、e I, method 5005 of MIL-STD-883 shall be omitted. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outpu