DLA SMD-5962-87656 REV C-2010 MICROCIRCUIT DIGITAL FAST CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outline S to device type 01. Add device type 02 to drawing for case outlines R, S, and 2. Add vendors CAGE 75569 and 27014 to device type 01. Add vendors CAGE 61722 and 75569 to device type 02. Editorial changes to table I and throughout

2、 drawing. 89-12-07 Michael A. Frye B Add notes to figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. - jak 06-04-18 Thomas M. Hess C Add footnote 4/ to ICCtest in table I. jak 10-01-06 Thomas M.

3、Hess REV SHET REV SHET REV STATUS REV C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY James E. Nicklaus DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking THIS DRAWING IS AVAILABLE

4、FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL D-TYPE FLIP-FLOP WITH CLEAR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-11-16 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-87656 S

5、HEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E075-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1.

6、 SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87656 01 R ADrawing number Devic

7、e type (see 1.2.1) Case outline(see 1.2.2)Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT273 Octal D-type flip-flop with clear, TTL compatible inputs 02 54FCT273A Octal D-type flip-flop with

8、 clear, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip

9、carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +6.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input

10、diode current (IIK) . -20 mA DC output diode current (IOK) -50 mA DC output current (IOUT) 100 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junctio

11、n temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V Minimum high level input voltage (VIH) 2.0 V Case operating temperature range (TC) -55C to +125C Minimum setup time, high or low, data to

12、CP (ts): Device type 01 3.5 ns Device type 02 3.0 ns Minimum hold time, high or low, data to CP (th): Device type 01 2.5 ns Device type 02 2.0 ns Minimum CP pulse width, high or low (tw1): Device type 01 7.0 ns Device type 02 6.0 ns Minimum removal time, MR to CP (tREM): Device type 01 5.0 ns Device

13、 type 02 3.0 ns Minimum MR pulse width, low (tw2): Device type 01 7.0 ns Device type 02 6.0 ns 1/ Unless other wise specified, all voltages are referenced to ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

14、 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specifie

15、d herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard M

16、icrocircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quic

17、ksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this do

18、cument, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product

19、built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qual

20、ifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as des

21、cribed herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and here

22、in. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specif

23、ied on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CE

24、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range.

25、 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed

26、in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicato

27、r “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certifi

28、cate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the r

29、equirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change t

30、o DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the

31、 option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical perfo

32、rmance characteristics. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10%VCCDevice typeGroup A subgroups Limits Unit unless otherwise specified Min MaxHigh level output voltage VOHVIL= 0.8 V VIH= 2.0 V IOH= -300 A 4.5 V All 1, 2, 3 4.3 VIOH= -12 mA 2.4 Low level output voltage VOLVIL= 0.8 V VIH=

33、 2.0 V IOL= +300 A 4.5 V All 1, 2, 3 0.2 VIOL= +32 mA 0.5Input clamp voltage VIKIIN= -18 mA 4.5 V All 1 -1.2 VHigh level input current IIHVIN= 5.5 V 5.5 V All 1, 2, 3 5.0 ALow level input current IILVIN= GND 5.5 V All 1, 2, 3 -5.0 AShort circuit current IOS1/ VOUT= GND 5.5 V All 4 -60 mAQuiescent po

34、wer supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 Vfi= fCP= 0 MHz 5.5 V All 1, 2, 3 1.5 mAQuiescent power supply current (TTL inputs) ICC2/ VIN= 3.4 V 5.5 V All 1, 2, 3 2.0 mADynamic power supply current ICCD3/ 4/ MR = VCCOutputs open One bit toggling, 50% duty cycle VIN 0.2 V or VIN 5.3 V5.

35、5 V All 3/ 0.25 mA/MHz Total power supply current ICC4/ 5/ VIN 0.2 V or VIN 5.3 V fCP= 10 MHz Outputs open One bit toggling at fi= 5 MHz 50% duty cycle MR = VCC5.5 V All 1, 2, 3 4.0 mAVIN= 3.4 V or VIN= GND fCP= 10 MHz Outputs open eight bits toggling at fi= 2.5 MHz 50% duty cycle MR = VCC5.5 V All

36、1, 2, 3 6.0 mAInput capacitance CINSee 4.3.1c All 4 10 pFInput capacitance COUTSee 4.3.1c All 4 12 pFFunctional tests See 4.3.1d 4.5 V All 7, 8 Propagation delay time, CP to On tPHL1, tPLH16/ CL= 50 pF 10%RL= 500 5% RT= 50 See figure 4 4.5 V 01 9, 10, 11 2.0 15.0 ns4.5 V 02 9, 10, 11 2.0 8.3Propagat

37、ion delay time, MR to On tPHL26/ 4.5 V 01 9, 10, 11 2.0 15.0 ns4.5 V 02 9, 10, 11 2.0 8.31/ Not more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed 1 second. 2/ For TTL driven inputs, VIN= 3.4 V; all other inputs are equal to VCCor GN

38、D. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ For ICCtests, in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account,as its effect is not intended to be included in the

39、 test results. The impact must be characterized and appropriate offset factors must be applied to the test result.“ 5/ ICC= ICCQ + (ICCDHNT) + ICCD(fCP/2 + fiNi), where: DH= duty cycle for TTL input high; NT= number of TTL inputs at DH; fi= input frequency in MHz; Ni= number of inputs at fi; fCP= cl

40、ock frequency in MHz. 6/ The minimum limits are guaranteed, if not tested, to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH

41、IO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 MR O0 D0 D1 O1 O2 D2 D3 O3 GND CP O4 D4 D5 O5 O6 D6 D7 O7 VCCFIGURE 1. Terminal connections. Operating mode

42、 Inputs Outputs MR CP Dn On Reset (clear) L X X L Load “1” H h H Load “0” H l L L = Low voltage level H = High voltage level = Low-to-high transition of the clock h = High voltage level one setup time prior to the low-to-high clock transition l = Low voltage level one setup time prior to the low-to-

43、high clock transition X = Dont care FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 223

44、4 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. RL= 50

45、0 or equivalent. 2. RT= 50 or equivalent, terminal resistance which should be equal to ZOUTof the pulse generator. 3. CL= 50 pF or equivalent (includes test jig and probe capacitance). 4. Pulse generator for all pulses: tf 2.5 ns; tr 2.5 ns. FIGURE 4. Switching waveforms and test circuit. Provided b

46、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87656 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and in

47、spection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, m

48、ethod 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in