DLA SMD-5962-87671 REV F-2008 MICROCIRCUIT MEMORY DIGITAL BIPOLAR PROGRAMMING LOGIC MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE numbers 01295, 18324, and 34335 to the drawing. Added device types 05 and 06 for vendor CAGE number 34335. Change to absolute maximum ratings and table I. Editorial changes throughout. 90-03-29 M. Frye B Add device types 11 throug

2、h 18 for vendor CAGE 34335. Removed vendor CAGE 18324 as a source of supply for device types 05 and 06. Add vendor CAGE 01295 to device types 15 through 18, packages L, K, and 3. Editorial changes throughout. 91-05-09 M. Frye C Changes to table I; conditions for IIH, limits on ICC, and limits on som

3、e timing conditions. Change pin 16 on case outline 3 to OE . Add device type 19. Editorial changes throughout. 93-02-19 M. Frye D Changes in accordance with NOR 5962-R142-93 93-04-21 M. Frye E Update drawing to current requirements. Editorial changes throughout. - gap 02-01-07 Raymond Monnin F Boile

4、rplate update, part of 5 year review. ksr 08-04-25 Robert M. Heber THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV F F F F F F SHEET 15 16 17 18 19 20 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice

5、 DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Kenneth Rice COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-09-20 MICROCIRCUI

6、T, MEMORY, DIGITAL, BIPOLAR, PROGRAMMING LOGIC, MONOLITHIC SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-87671 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E345-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

7、ING SIZE A 5962-87671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.

8、2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87671 01 K A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic num

9、ber Circuit function 01 PAL20L8B 20-input 8-output AND-OR invert gate array 02 PAL20R8B 20-input 8-output registered AND-OR gate array 03 PAL20R6B 20-input 6-output registered AND-OR gate array 04 PAL20R4B 20-input 4-output registered AND-OR gate array 05 PLUS20L8 20-input 8-output AND-OR invert gat

10、e array 06 PLUS20R8 20-input 8-output registered AND-OR gate array 07 PAL20L8-15 20-input 8-output AND-OR invert gate array 08 PAL20R8-15 20-input 8-output registered AND-OR gate array 09 PAL20R6-15 20-input 6-output registered AND-OR gate array 10 PAL20R4-15 20-input 4-output registered AND-OR gate

11、 array 11 PAL20L8-12 20-input 8-output AND-OR invert gate array 12 PAL20R8-12 20-input 8-output registered AND-OR gate array 13 PAL20R6-12 20-input 6-output registered AND-OR gate array 14 PAL20R4-12 20-input 4-output registered AND-OR gate array 15 PAL20L8-10 20-input 8-output AND-OR invert gate ar

12、ray 16 PAL20R8-10 20-input 8-output registered AND-OR gate array 17 PAL20R6-10 20-input 6-output registered AND-OR gate array 18 PAL20R4-10 20-input 4-output registered AND-OR gate array 19 PAL20R8-7 20-input 8-output registered AND-OR gate array 1.2.2 Case outline(s). The case outline(s) are as des

13、ignated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, append

14、ix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. Supply voltage

15、 range -0.5 V dc to +7 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) 1/ . See MIL-STD-1835 Output voltage applied 5.5 V dc Output sink current . 100 mA Maximu

16、m power dissipation (PD) 2/ 1.2 W Maximum junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.8 V dc Case operating temperatur

17、e range (TC) . -55 C to +125 C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited i

18、n the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. D

19、EPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk,

20、 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulatio

21、ns unless a specific exemption has been obtained. 1/ Heat sinking is recommended to reduce the junction temperature. 2/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCI

22、RCUIT DRAWING SIZE A 5962-87671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and

23、as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers a

24、pproved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications sh

25、all not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-P

26、RF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.3.1 Unprogrammed devic

27、es. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C (see 4.4), the devices shall be programmed by the manufacturer prior to test with a minimum of 50 percent of the total number of gates pr

28、ogrammed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered drawing. 3.2.4 Logic diagram. The logic diagram for unprogrammed

29、 devices shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The elec

30、trical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacture

31、rs PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN device

32、s built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a

33、 manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to Defense Supply Center Columbus DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements

34、of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to Defense Su

35、pply Center Columbus DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. Defense Supply Center Columbus (DSCC), DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore

36、documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHE

37、ET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Input clamp VICVCC= 4.5 V, II= -18 mA 1 All -1.5 V voltage High level output VOHVCC= 4.5 V,

38、 VIL 0.8 V, 1, 2, 3 01-18 2.4 V voltage VIH 2.0 V, IOH= -2 mA 1, 2 19 2.4 3 19 2.3 Low level output VOLVCC= 4.5 V, VIL 0.8 V, 1, 2, 3 All 0.5 V voltage VIH 2.0 V, IOL= 12 mA High level input VIHVCC= 5.5 V 2/ 1, 2, 3 All 2.0 V voltage Low level input VILVCC= 5.5 V 2/ 1, 2, 3 All 0.8 V voltage High le

39、vel input IIHVCC= 5.5 V, OE 1, 2, 3 All 40 A current VI= 2.4 V, 3/ all other pins = others 25 0.0 V Low level input IILVCC= 5.5 V, VI= 0.4 V 3/ 1, 2, 3 All -0.25 mA current Output short IOSVCC= 5.5 V, VO= 0.5 V 4/ 1, 2, 3 01, 02, -30 -250 mA circuit current VIH 2.0 V, VIL 0.8 V 03, 04, 07, 08, 09, 1

40、0, 11, 12, 13, 14, 15, 16, 17, 18 05, 06 -30 -90 19 -30 -130 Input current IIVCC= 5.5 V, VI= 5.5 V 1, 2, 3 All 1.0 mA Off-state output IOZLVCC= 5.5 V, VIL 0.8 V 1, 2, 3 All -250 A current VIH 2.0 V, VO= 0.4 V 3/ Off-state output IOZHVCC= 5.5 V, VIL 0.8 V 1, 2, 3 All 100 A current VIH 2.0 V, VO= 2.4

41、V 3/ Supply current ICCVCC= 5.5 V 1, 2, 3 01-14 210 mA 15-19 220 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 R

42、EVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Propagation delay tPHLVCC= 5.0 V, 10 percent, 9, 10, 11 01, 03

43、, 20 ns data input to output CL= 50 pF 04 R1= 390, R2= 750, 07, 09, 15 or equivalent 10 11, 13, 12 14 05, 15, 10 17, 18 Propagation delay tPLH9, 10, 11 01, 03, 20 ns data input to output 04 07, 09, 15 10 11, 13, 12 14 05, 15, 10 17, 18 Propagation delay tPZH9, 10, 11 01, 03, 25 ns high impedance 04

44、to output high 07, 09, 10, 11, 15 13, 14 05, 15, 12 17, 18 Propagation delay tPZL9, 10, 11 01, 03, 25 ns high impedance 04 to output low 07, 09, 10, 11, 15 13, 14 05, 15, 12 17, 18 Propagation delay tPHZ9, 10, 11 01, 03, 20 ns output high to 04 high impedance 07, 09, 5/ 10, 11, 15 13, 14 05, 15, 12

45、17, 18 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Ele

46、ctrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Propagation delay tPLZVCC= 5.0 V, 10 percent, 9, 10, 11 01, 03, 20 ns output low to CL= 50 pF 04 high impedance RL= 390,

47、 R2= 750, 07, 09, 5/ or equivalent 10, 11, 15 13, 14 05, 15, 12 17, 18 Propagation delay tPZH9, 10, 11 02, 03, 20 ns high impedance to 04 output high (pin 08, 09, 13 to output 10, 12, 15 enable) 13, 14 06, 16, 12 17, 18 19 8 Propagation delay tPZL9, 10, 11 02, 03, 20 ns high impedance to 04 output l

48、ow (pin 08, 09, 13 to output 10, 12, 15 enable) 13, 14 06, 16, 12 17, 18 19 8 Propagation delay tPHZ9, 10, 11 02, 03, 20 ns output high to 04 high impedance 08, 09, (pin 13 to output 10, 12, 15 disable) 13, 14 5/ 06, 16, 12 17, 18, 19 10 Propagation delay tPLZ9, 10, 11 02, 03, 20 ns output low to 04 high impedance 08, 09, (pin 13 to output 10, 12, 15 disable) 5/ 13, 14 06, 16, 12 17, 18 19 10 See footnotes