DLA SMD-5962-87703 REV A-2006 MICROCIRCUIT MEMORY DIGITAL BIPOLAR 256 X 9-BIT RAM MONOLITHIC SILICON《硅单块 256X9比特随机存取存储器 双极数字主储存器微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update, part of 5 year review. ksr 06-09-28 Raymond Monnin The original first page of this drawing has been replaced. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARE

2、D BY Rick C. Officer DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert P. Evans AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

3、 87-11-09 MICROCIRCUIT, MEMORY, DIGITAL, BIPOLAR, 256 X 9-BIT RAM, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-87703 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E642-06 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

4、RD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-3

5、8535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87703 01 W A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Dev

6、ice type Generic number Circuit function Access time 01 82S212 2304-bit bipolar RAM (three-state) 70 ns 02 93479 2304-bit bipolar RAM (three-state) 60 ns 03 93479 2304-bit bipolar RAM (three-state) 45 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Out

7、line letter Descriptive designator Terminals Package style W GDIP1-T22 or CDIP2-T22 22 dual-in-line package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage +7 V dc maximum Input voltage. +5.5 V dc maximum Storage temperatu

8、re range -65C to +150C Maximum power dissipation (PD) 1.05 W 1/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . (See MIL-STD-1835) Junction temperature (TJ). +200C 1.4 Recommended operating conditions. Supply voltage range (VCC). +4.75 V dc to +5.25 V dc Ca

9、se operating temperature range (TC) . -55C to +125C Minimum high level input voltage . 2.0 V dc Maximum low level input voltage 0.8 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing t

10、o the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - T

11、est Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assi

12、st.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Must withstand the added PDdue to short circuit test (e.g., IOS).Provided by IHSNot for ResaleNo reproduction or networking per

13、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited he

14、rein, the text of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, append

15、ix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML pro

16、duct in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or fun

17、ction of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physica

18、l dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on fi

19、gure 3. 3.2.4 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature rang

20、e. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN liste

21、d in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indica

22、tor “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certi

23、ficate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the

24、 requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change

25、 to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at t

26、he option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical per

27、formance characteristics. Test Symbol Conditions 1/ 2/ Device Group A Limits Unit -55C TC +125C type subgroups 4.75 V VCC 5.25 V Min Max See figures 4 and 5 Input voltage low VIL All 1, 2, 3 0.8 V Input voltage high VIH All 1, 2, 3 2.0 V Input voltage clamp VIC VCC= minimum, All 1, 2, 3 -1.5 V 3/ II

28、N= -18 mA Output voltage low VOL VCC= minimum, All 1, 2, 3 0.5 V 4/ IOL= 9.6 mA Output voltage high VOH VCC= minimum, All 1, 2, 3 2.4 V 5/ IOH= -2 mA Input current low IIL VCC= maximum, 01 1, 2, 3 -150 A VIN= 0.45 V 02,03 -400 Input current high IIH VCC= maximum, All 1, 2, 3 40 A VIN= 5.5 V Output c

29、urrent high Z IOZ VCC= maximum, All 1, 2, 3 A state CE = high, VOUT= 5.5 V 80 CE = high, VOUT= 0.5 V -100 Output short circuit IOS CE = OD, low, All 1, 2, 3 -15 -85 mA current 3/ 6/ VOUT= 0 V, stored high, VCC= maximum VCCsupply current ICC CE = high, VCC= maximum All 1, 2, 3 200 mA 7/ Address acces

30、s time tAA See figures 6 and 7 01 9,10,11 70 ns 02 60 03 45 Output enable time tOE All 9,10,11 50 ns from OD to output See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFE

31、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ Device Group A Limits Unit -55C TC +125C type subgroups 4.75 V VCC 5.25 V Min Max See figures 4 and 5 Output ena

32、ble time tCE See figures 6 and 7 All 9,10,11 50 ns from CE to output Output disable time tOD All 9,10,11 50 ns from OD to output Output disable time tCD All 9,10,11 50 ns from CE to output Write pulse width 8/ tWP 01 9,10,11 45 ns 02,03 40 Setup time from write tSWC All 9,10,11 10 ns to WE Hold time

33、 from WE to tWHC All 9,10,11 10 ns CE Setup time from data tWSD 01 9,10,11 45 ns in to write 02,03 50 Hold time from write tWHD All 9,10,11 10 ns to data in Setup time from tWSA All 9,10,11 10 ns address to write Hold time from write tWHA All 9,10,11 15 ns to address Setup time from OD tSO All 9,10,

34、11 5 ns to CE Hold time from CE to tHO All 9,10,11 5 ns OD 1/ All voltage values are with respect to network ground terminal. 2/ The operating case temperature ranges are guaranteed with transverse air flow exceeding 400 linear feet per minute and a 2 minute warmup. This test condition will be guara

35、nteed by testing at -40C using instant on testing. Typical thermal resistance values of the package at maximum temperature are: JCjunction-to-case at 400 fpm air flow: 50C/W. JCjunction-to-case still air: 90C/W. JCjunction-to-case: 20C/W. 3/ Test each pin one at a time. 4/ Measured with a logic low

36、stored. Output sink current is supplied through a resistor to VCC. 5/ Measured with a logic high. 6/ Duration of the short circuit should not exceed 1 second. 7/ ICCis measured with the write enable and memory enable inputs grounded, all other inputs at 4.5 V and the output open. 8/ Minimum required

37、 to guarantee a write into the slowest bit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device

38、 types ALL Case Outline W Terminal Number Terminal Symbol 1 D82 D73 D64 D55 D46 D37 D28 D19 D010 OD 11 GND 12 WE 13 CE 14 A015 A116 A217 A318 A419 A520 A621 A722 VCCFIGURE 1. Terminal connections. Mode WE CE OD DN in/out Disable output X X 1 High Z Disable R/W X 1 X High Z Write 0 0 1 Data in Read 1

39、 0 0 Data out FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3 Bloc

40、k diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 4. Typical I/O structure. Provid

41、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 ALL RESISTOR VALUES ARE TYPICAL FIGURE 5. Test load circ

42、uit. MEASUREMENTS, ALL CIRCUIT DELAYS ARE MEASURED AT THE +1.5 V LEVEL OF INPUTS AND OUTPUT. NOTE: tr, tf 5 ns FIGURE 6. Voltage waveform. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY

43、CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 FIGURE 7. Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87703 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-3