DLA SMD-5962-87711 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR TTL DUAL MONOSTABLE MULTIVIBRATOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. - les 01-09-19 Raymond Monnin B Update drawing to current requirements. Editorial changes throughout. - gap 09-02-06 Robert M. Heber The original first she

2、et of this drawing has been replaced. REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Grosel DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.ds

3、cc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, TTL, DUAL MONOSTABLE MULTIVIBRATOR, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-11-02 MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268

4、 5962-87711 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E367-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2

5、234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87711 01 E X Drawin

6、g number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54221 Dual monostable multivibrator 1.2.2 Case outline(s). The case outline(s) are as desig

7、nated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc to +7.0

8、 V dc Input voltage range (VIN) . -1.5 V dc to +5.5 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) . 440 mW 1/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC): Case E . 60C/W Thermal resistance, junction-to-ambient (JA): Case E

9、. 90C/W Junction temperature (TJ) +150C _ 1/ Must withstand the added PDdue to short circuit test (e.g. IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI

10、O 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) : Input A 2.0 V Maximum low level input voltage (VIL): Input A 0.8 V High level output current (I

11、OH) . -800 A maximum Low level output current (IOL) 16 mA maximum Rate of rise or fall of input pulse (dv/dt): Schmitt input, B 1 V/s minimum Logic input, A . 1V/s minimum Input pulse width: A or B, tW(IN)50 ns minimum Clear, tW(CLEAR). 20 ns minimum Clear-inactive-state setup time (tSU) 15 ns minim

12、um External timing resistance (REXT) 1.4 k to 30 k External timing capacitance (CEXT) . 0 pF to 1000 nF Output duty cycle: REXT= 2 k 67 percent maximum REXT= 30 k 90 percent maximum Ambient operating temperature (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, an

13、d handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Cir

14、cuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780

15、 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the

16、 text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without

17、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A f

18、or non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product i

19、n accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function

20、of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dime

21、nsions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on fig

22、ure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms. The switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as spec

23、ified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accor

24、dance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking th

25、e “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to

26、identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as a

27、n approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircu

28、its delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable re

29、quired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

30、43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA+125C Group A subgroups Limits Unit unless otherwise specified Min Max Positive going threshold voltage VT+VCC= 4.5 V, Input B 1, 2, 3 2 V Negative going threshold

31、 voltage VT-VCC= 4.5 V, Input B 1, 2, 3 0.8 V High level output voltage VOHVCC= 4.5 V, IOH= -0.8 mA 1, 2, 3 2.4 V Low level output voltage VOLVCC= 4.5 V, IOL= 16 mA 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -12 mA 1, 2, 3 -1.5 V Input current IIVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 1.0 mA Input

32、 A 1, 2, 3 40 A High level input current IIHVCC= 5.5 V, VIH= 2.4 V Input B, Clear 80 A Input A 1, 2, 3 -1.6 mA Low level input current IILVCC= 5.5 V, VIL= 0.4 V Input B, Clear -3.2 mA Short circuit output current IOSVCC= 5.5 V 1/ 1, 2, 3 -20 -55 mA Quiescent 1, 2, 3 50 mA Supply current ICCHVCC= 5.5

33、 V Triggered 2/ 1, 2, 3 80 mA Functional tests See 4.3.1c 7 9 70 ns Propagation delay time, A to Q tPLH110, 11 91 9 80 ns Propagation delay time, A to Q tPHL110, 11 104 9 55 ns Propagation delay time, B to Q tPLH210, 11 71.5 9 65 ns Propagation delay time, B to Q tPHL2CL= 15 pF, RL= 400 CEXT= 80 pF,

34、 REXT= 2 k VCC= 5.0 V (See figure 4) 10, 11 84.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B

35、SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA +125C Group A subgroups Limits Unit unless otherwise specified Min Max 9 40 ns Propagation delay time, clear to Q tPLH310, 11 52 ns 9 27 ns Propagation delay time, clear to Q tPH

36、L3CL= 15 pF, RL= 400 CEXT= 80 pF, REXT= 2 k VCC= 5.0 V, (See figure 4) 10, 11 35.5 ns Pulse width, A or B to Q or Q tW(out)CEXT= 80 pF, REXT= 2 k 9 70 150 ns CEXT= 0 pF, REXT= 2 k 9 20 50 ns EXT= 100 pF, REXT= 10 k 9 650 750 ns CL= 15 pF, RL= 400 TA= +25C, VCC= 5.0 V (See figure 4) CEXT= 1 F, REXT=

37、10 k 2/ 9 6.5 7.5 ms 1/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not exceed one second. 2/ This test is guaranteed if not tested to the parameters specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permi

38、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Case outline E Terminal number Terminal Symbol 1 1A 2 1B 3 1 CLR 4 1 Q 5 2Q 6 2cext 7 2REXT/cEXT8 GND 9 2A 10 2B 1

39、1 2 CLR 12 2 Q 13 1Q 14 1cEXT15 1REXT/cEXT16 VCCFIGURE 1. Terminal connections. Inputs Outputs Clear A B Q Q L X X L H X H X L H X X L L H H L _|_ |_|* H H _|_ |_|* * L H _|_ |_|* H = High level voltage. L = Low level voltage. X Irrelevant. _|_ = One high level pulse. |_| = One low level pulse. = Lo

40、w to high level transition. = High to low level transition. * This condition is true only if the output of the latch formed by the two NAND gates has been conditioned to the logical “1“ state prior to CLR going high. This latch is conditioned by taking either A high or B low while CLR is in the inac

41、tive state. * Tested under subgroup 9. FIGURE 2. Truth table (each monostable) . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B

42、 SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram (one-half of the device) . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

43、B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FOR

44、M 2234 APR 97 NOTES: 1. Input pulses are supplied by generators having the following characteristics: PRR = 1 MHz, ZOUT 50 , tr 7 ns, tf 7 ns. Duty cycle = 50% 50%. 2. All measurements are made between the 1.5 V points of the indicated transitions. FIGURE 4. Switching waveforms - Continued. Provided

45、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and

46、 inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test

47、, method 1015 of MIL-STD-883. (1) Test condition A, D, or E. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and

48、 power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements S