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本文(DLA SMD-5962-87722 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS TRIPLE 3-INPUT OR GATE MONOLITHIC SILICON.pdf)为本站会员(boatfragile160)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-87722 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS TRIPLE 3-INPUT OR GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-06-07 Thomas M. Hess B To correct Vendor pin number for part 5962-8772201CA. Update boilerplate paragraph to MIL-PRF-38535 requi

2、rements. MAA 11-01-26 Thomas M. Hess REV SHET REV SHET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY James E. Nicklaus DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THI

3、S DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert P. Evans MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, TRIPLE 3-INPUT OR GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-10-13 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87722 SHEET

4、1 OF 11 DSCC FORM 2233 APR 97 5962-E149-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Sco

5、pe. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87722 01 C A Drawing number Device type (see 1

6、.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC4075 Triple 3-input OR gate 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as fo

7、llows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Sup

8、ply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) . 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperatur

9、e range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 2/ Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V

10、 dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provide

11、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, a

12、nd handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Ci

13、rcuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780

14、 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between th

15、e text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shal

16、l be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification

17、 to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These mod

18、ifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dime

19、nsions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Trut

20、h table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction o

21、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance

22、 characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking.

23、Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the

24、 option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordan

25、ce with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC

26、-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided wi

27、th each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime DLA Land and Maritimes agent, and the acquiring activ

28、ity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC

29、UIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max High level

30、 output voltage VOHVIN= VIHor VILIOH= - 20 A VCC= 2.0 V All 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 IOH=- 4.0 mA VCC= 4.5 V 3.7 IOH= - 5.2 mA VCC= 6.0 V 5.2 Low level output voltage VOLVIN= VIHor VILIOL= + 20 A VCC= 2.0 V All 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 IOL= + 4.0 mA VCC= 4.5 V 0

31、.4 IOL= + 5.2 mA VCC= 6.0 V 0.4 High level input voltage 2/ VIHVCC= 2.0 V All 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage 2/ VILVCC= 2.0 V All 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C See 4.3.1c All 4 10 pF Quiescent supply curren

32、t ICCVCC= 6.0 V, VIN= VCCor GND All 1, 2, 3 160 A Input leakage current IINVCC= 6.0 V, VIN= VCCor GND All 1, 2, 3 1.0 A Functional tests See 4.3.1d All 7 L H Propagation delay time, An, Bn, or Cn to output Yn 3/ tPHL, tPLH CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 115 ns 10, 11 175 VCC= 4.5 V 9 23

33、 10, 11 35 VCC= 6.0 V 9 20 10, 11 30 Transition time 4/ tTHL, tTLH CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 See footnotes on next sheet. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

34、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur at VC

35、C= 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage, so the 6.0 V value should be used.

36、Power dissipation capacitance (CPD), typically 100 pF, determine the no- load dynamic power consumption (PD) and the no-load dynamic current consumption (IS). Where PD= CPDVCC2f + ICCVCCIS= CPDVCCf + ICCf is the frequency of the input signal. 2/ Test not required if applied as a forcing function for

37、 VOHor VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified parameters. 4/ Transition time (tTLH, tTHL), if not tested, shall be guaranteed to the specified parameters. Provided by IHSNot for ResaleNo reproduction or networking permitted without licens

38、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outlines C and D 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A1

39、B1 A2 B2 C2 Y2 GND C1 Y1 Y3 A3 B3 C3 VCC- - - - - - NC A1 B1 A2 NC B2 NC C2 Y2 GND NC C1 Y1 Y3 NC A3 NC B3 C3 VCCNC = No internal connection FIGURE 1. Terminal connections. Inputs Outputs An Bn Cn Yn L L L L H X X H X H X H X X H H H = High voltage level L = Low voltage level X = Irrelevant FIGURE 2

40、. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot

41、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes test jig and probe capacitance. 2. Input signal from puls

42、e generator: VIN= 0.0 V to VCC; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.1 VCCto 0.9 VCCand from 0.9 VCCto 0.1 VCC, respectively; duty cycle = 50 percent. 3. Timing parameters shall be tested at a minimum input frequency of 1 MHz. 4. The outputs are measured one at

43、 a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87722 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

44、L B SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qu

45、ality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or a

46、cquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in ta

47、ble II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5

48、004) - Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test requirements (method 5005) 1, 2, 3, 4, 7, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be i

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