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本文(DLA SMD-5962-87723 REV A-2012 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS 13-INPUT NAND GATE MONOLITHIC SILICON.pdf)为本站会员(boatfragile160)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-87723 REV A-2012 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS 13-INPUT NAND GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change the conditions for VOHand VOLtests to read more correctly in table I. Update boilerplate to current MIL-PRF-38535 requirements. Editorial changes throughout . - jak 12-02-02 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV ST

2、ATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Daniel A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS A

3、PPROVED BY Robert P. Evans MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 13-INPUT NAND GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-10-13 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-87723 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E111-12 Provided by

4、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-

5、STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87723 01 E A Drawing number Device type Case outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5)

6、1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC133 13-input NAND gate 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Pa

7、ckage style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (V

8、CC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp current (IIK) (VINVCC) . 20 mA Output clamp current (IOK) (VOUTVCC) . 20 mA Continuous output current (IOUT) (VOUT= 0.0 to VCC) 25 mA Continuous cu

9、rrent through VCCor GND . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 3/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions.

10、 2/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Ex

11、tended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

12、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this

13、drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD

14、-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at ht

15、tps:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, th

16、e issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JE

17、DEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supers

18、edes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing t

19、hat is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approva

20、l in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or

21、 “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MI

22、L-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. Provided by IHSNot for ResaleNo reproduction or networking permitted without

23、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on f

24、igure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirra

25、diation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Mar

26、king. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer h

27、as the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in ac

28、cordance with MIL-PRF-38535 to identify when the QML flow option is used 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to

29、 DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix

30、 A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent,

31、 and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

32、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C Group A subgroups Limits Unit unless otherwise specified

33、Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -4.0 mA VCC= 4.5 V 1, 2, 3 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA VCC= 6.0 V 1, 2, 3 5.2 Low level output voltage VOLVIN= VI

34、Hminimum or VILmaximum IOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA VCC= 4.5 V 1, 2, 3 0.40 VIN= VIHminimum or VILmaximum IOL= +5.2 mA VCC= 6.0 V 1, 2, 3 0.40 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC=

35、 6.0 V 4.2 Low level input voltage VIL 2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C, See 4.3.1c 4 10.0 pF Quiescent supply current ICCVIN = VCC or GND VCC= 6.0 V 1, 2, 3 40.0 A Input leakage current IINVIN= VCCor GND VCC= 6.0 V 1, 2, 3 1.0 A See

36、 footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance

37、 characteristics - Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Functional tests See 4.3.1b 7 Propagation delay time, any input to output tPLH, tPHL 3/ TC= +25C CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 175.0 ns VCC= 4.5 V 35.

38、0 VCC= 6.0 V 30.0 TC= -55C and +125C CL= 50 pF 10% See figure 4 VCC= 2.0 V 10, 11 265.0 ns VCC= 4.5 V 53.0 VCC= 6.0 V 45.0 Transition time, high to low, low to high tTHL, tTLH 4/ TC= +25C CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 75.0 ns VCC= 4.5 V 15.0 VCC= 6.0 V 13.0 TC= -55C and +125C CL= 50 pF 10%

39、 See figure 4 VCC= 2.0 V 10, 11 110.0 ns VCC= 4.5 V 22.0 VCC= 6.0 V 19.0 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V r

40、espectively. (The VIHvalue at 5.5 V is 3.85 V.) The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage, so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 40 pF per latch, determines the no load dynamic power consumption, PD= CPDVCC2f+ICCVCC

41、, and the no load dynamic current consumption, IS= CPDVCCf + ICC. 2/ Tests not required if applied as a forcing function for VOHand VOL. 3/ For propagation delay times VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits in table I. 4/ Transition time (tTLH, tTHL), i

42、f not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2

43、234 APR 97 Device type 01 Case outline E 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A B C D E F G GND Y H I J K L M VCCNC A B C D NC E F G GND NC Y H I J NC K L M VCCNC = No internal connection. FIGURE 1. Terminal connections. Inputs A throug

44、h M Output All inputs high L All other combinations H H = High voltage level L = Low voltage level FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS,

45、OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A S

46、HEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL = 50 pF minimum or equivalent (includes probe and test fixture capacitance). 2. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr= 6.0 ns, tf

47、= 6.0 ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. Timing parameters shall be tested at a minimum input frequency of 1 MHz. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

48、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87723 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qu

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