DLA SMD-5962-87727 REV D-2011 MICROCIRCUIT DIGITAL ECL TRIPLE 2-INPUT EXCLUSIVE OR NOR GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add figure 4. Technical changes in 1.3, 1.4, table I, and table II. Change terminal connections. Editorial changes throughout. 89-08-18 M. A. FRYE B Changes in accordance with N.O.R. 5962-R067-92. 91-12-09 M. L. POELKING C Drawing updated to refl

2、ect current requirements. Redrawn. - ro 05-06-07 R. MONNIN D Update drawing as part of 5 year review. - jt 11-09-14 C. SAFFLE REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY MONICA L. GROSEL DLA LAND AND MARITIME COLUMBUS, OH

3、IO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCENZO APPROVED BY ROBERT P. EVANS MICROCIRCUIT, DIGITAL, ECL, TRIPLE, 2-INPUT EXCLUSIVE OR/NOR GATE, MONOLIT

4、HIC SILICON DRAWING APPROVAL DATE 87-11-19 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-87727 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E499-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DL

5、A LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN

6、). The complete PIN is as shown in the following example: 5962-87727 01 E X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 10H507 Tri

7、ple 2-input EXCLUSIVE-OR/NOR gate 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip

8、carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VEE) -8.0 V dc to 0.0. V dc Input voltage range . -5.2 V dc to 0.0 V dc Storage temperature range . -65C to +165C Lead temperature (soldering, 10 seconds) . +3

9、00C Junction temperature (TJ) . +165C Maximum power dissipation (PD) . 125 mW Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VEE) -5.46 V dc to -4.94 V dc Supply voltage range (VCC) -0.02 V dc to +0.02 V dc or +1.98 V dc to +2

10、.02 V dc Ambient operating temperature range (TA) . -55C to +125C Minimum high level input voltage (VIH) : TA= +25C -0.780 V dc TA= +125C -0.650 V dc TA= -55C -0.840 V dc Maximum low level input voltage (VIL) -1.950 V dc Provided by IHSNot for ResaleNo reproduction or networking permitted without li

11、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form

12、 a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE

13、STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are avail

14、able online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of thi

15、s drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class lev

16、el B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with th

17、e manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These

18、 modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as s

19、pecified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic

20、 diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteris

21、tics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for

22、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +

23、125C unless otherwise specified Group A subgroups Limits Unit Min Max Cases E, F, and 2 Quiescent tests 1/ VIHVILHigh level output VOHOutputs 2/ -0.780 -1.950 1 -1.010 -0.780 V voltage terminated -0.650 -1.950 2 -0.860 -0.650 through -0.840 -1.950 3 -1.060 -0.840 Low level output VOL100 to -2.0 V, -

24、0.780 -1.950 1 -1.950 -1.580 V voltage VEE= -5.2 V, -0.650 -1.950 2 -1.950 -1.565 VCC= 0.0 V -0.840 -1.950 3 -1.950 -1.610 High level threshold VOHA-1.110 -1.480 1 -1.010 -0.780 V output voltage -0.960 -1.465 2 -0.860 -0.650 -1.160 -1.510 3 -1.060 -0.840 Low level threshold VOLA-1.110 -1.480 1 -1.95

25、0 -1.580 V output voltage -0.960 -1.465 2 -1.950 -1.565 -1.160 -1.510 3 -1.950 -1.610 Power supply drain 3/ current IEEVEE= -5.46 V, VCC= 0.0 V, VIH= -0.780 V at +25C 1 -28 mA -0.650 V at +125C -0.840 V at -55C 2,3 -31 High level input IIH1Input A 1 220 A current 2,3 425 IIH2Input B 1 265 2,3 425 Lo

26、w level input current IILVEE= -4.94 V, VIL= -1.950 V, 1,3 0.5 A VCC= 0.0 V 2 0.3 Functional tests See 4.3.1c 7,8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DLA LAND A

27、ND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Limits Unit Min Max Cases E and F DC rapid tests 4/ VIHVILHigh level outpu

28、t VOHOutputs 2/ -0.789 -1.950 1 -1.019 -0.789 V voltage terminated -0.660 -1.950 2 -0.860 -0.660 through -0.850 -1.950 3 -1.069 -0.850 Low level output VOL100 to -2.0 V, -0.789 -1.950 1 -1.950 -1.583 V voltage VEE= -5.2 V, -0.660 -1.950 2 -1.950 -1.568 VCC= 0.0 V -0.850 -1.950 3 -1.950 -1.613 High l

29、evel threshold VOHA-1.119 -1.483 1 -1.019 -0.789 V output voltage -0.969 -1.468 2 -0.869 -0.660 -1.169 -1.513 3 -1.069 -0.850 Low level threshold VOLA-1.119 -1.483 1 -1.950 -1.583 V output voltage -0.969 -1.468 2 -1.950 -1.568 -1.169 -1.513 3 -1.950 -1.613 Power supply drain 3/ current IEEVEE= -5.46

30、 V, VCC= 0.0 V, VIH= -0.789 V at +25C 1 -27 mA -0.660 V at +125C -0.850 V at -55C 2,3 -30 High level input IIH1Input A 1,2 205 A current 3 410 IIH2Input B 1,2 250 3 410 Low level input current IILVEE= -4.94 V, VIL= -1.950 V, 1,3 0.5 A VCC= 0.0 V 2 0.3 Functional tests See 4.3.1c 7,8 See footnotes at

31、 end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characterist

32、ics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Limits Unit Min Max Case 2 DC rapid tests 4/ VIHVILHigh level output VOHOutputs 2/ -0.794 -1.950 1 -1.023 -0.794 V voltage terminated -0.665 -1.950 2 -0.874 -0.665 through -0.855 -1.950 3 -1.074 -0.855 L

33、ow level output VOL100 to -2.0 V, -0.794 -1.950 1 -1.950 -1.584 V voltage VEE= -5.2 V, -0.665 -1.950 2 -1.950 -1.570 VCC= 0.0 V -0.855 -1.950 3 -1.950 -1.615 High level threshold VOHA-1.123 -1.484 1 -1.023 -0.794 V output voltage -0.974 -1.470 2 -0.874 -0.665 -1.174 -1.515 3 -1.074 -0.855 Low level

34、threshold VOLA-1.123 -1.484 1 -1.950 -1.584 V output voltage -0.974 -1.470 2 -1.950 -1.570 -1.174 -1.515 3 -1.950 -1.615 Power supply drain 3/ current IEEVEE= -5.46 V, VCC= 0.0 V, VIH= -0.794 V at +25C 1 -27 mA -0.665 V at +125C -0.855 V at -55C 2,3 -30 High level input IIH1Input A 1 205 A current 2

35、,3 410 IIH2Input B 1 250 2,3 410 Low level input current IILVEE= -4.94 V, VIL= -1.950 V, 1,3 0.5 A VCC= 0.0 V 2 0.3 Functional tests See 4.3.1c 7,8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D

36、RAWING SIZE A 5962-87727 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Limits Unit Min Max Cases E, F, and 2 A

37、C tests Transition time tTLH, VEE= -2.94 V, VCC= 2.0 V, 9 0.50 1.60 ns tTHLCL 5 pF, 10 0.50 1.90 load all outputs through 100 to 11 0.50 1.50 Propagation delay time, tPLH, ground, see figure 4 9 0.40 1.60 ns Input to output tPHL,10 0.40 1.90 tPHH, 11 0.40 1.50 tPLL1/ The quiescent limits are determi

38、ned after a device has reached thermal equilibrium. This is defined as the reading taken with the device in a socket with 500 LFPM of +25C, +125C or -55C (as applicable) air blowing on the unit in a transverse direction with power applied for at least four (4) minutes before the reading is taken. Th

39、is method was used for theoretical limit establishment only. All devices shall be tested to the delta V (rapid test) conditions specified herein. The rapid test method is an equivalent method of testing quiescent conditions. 2/ The high and low level output current varies with temperature, and shall

40、 be calculated using the following formulas: IOH= ( -2 - VOH) / 100 IOL= ( -2 - VOL) / 100 3/ The IEElimit, although specified in the minimum column, shall not be exceeded in magnitude, as a minimum value. 4/ The dc rapid test forcing functions and limits are used for all dc testing. These limits ar

41、e determined for each device type based on the power dissipation and package type. The rapid test (delta V) limits and forcing functions are skewed allowing rapid testing to be performed at standard temperatures without the addition of delta Ts. 3.5 Marking. Marking shall be in accordance with MIL-P

42、RF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the

43、 device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when th

44、e QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as

45、 an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcir

46、cuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outlin

47、es E F 2 Terminal number Terminal symbol 1 VCC1Y3 NC 2 Y1 A3 VCC13 Y1 B3 Y1 4 A1 VCC2Y1 5 B1 VCC1A1 6 NC Y1 NC 7 B2 Y1 B1 8 VEEA1 NC 9 A2 B1 B2 10 Y2 NC VEE11 Y2 B2 NC 12 Y3 VEEA2 13 Y3 A2 Y2 14 A3 Y2 Y2 15 B3 Y2 Y3 16 VCC2Y3 NC 17 - - Y3 18 - - A3 19 - - B3 20 - - VCC2NC = No connection FIGURE 1. T

48、erminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87727 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 Inputs Outputs A B Y Y L L L H L H H L H L H L H H L H L = low level voltage H = high level voltage FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo rep