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本文(DLA SMD-5962-87756 REV F-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL D-TYPE FLIP-FLOP WITH MASTER RESET MONOLITHIC SILICON.pdf)为本站会员(ideacase155)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-87756 REV F-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL D-TYPE FLIP-FLOP WITH MASTER RESET MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE F8859. Add device class V criteria. Editorial changes throughout. gap 00-01-05 Raymond Monnin B Add case outline X. Add delta limits, table III. Update boilerplate. cfs 00-09-18 Monica L. Poelking C Add case outline Z. Update boil

2、erplate to MIL-PRF-38535 requirements. jak 01-08-07 Thomas M. Hess D Add radiation features, section 1.5. Add radiation criteria in table I. Change case outline X lead temperature in section 1.3. Correct the waveforms in figure 5. Update boilerplate to include radiation hardness assured requirements

3、. - jak 05-05-27 Thomas M. Hess E Add die for device type 01 and die appendix A. Update radiation features in section 1.5 and SEP test limits table IB. Update boilerplate paragraphs to current MIL-PRF-38535 requirements. MAA 10-11-24 Thomas M. Hess F Update dimensions of case outline X to figure 1.

4、- LTG 12-07-25 Thomas M. Hess REV SHEET REV F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime

5、.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY William J. Johnson APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL D-TYPE FLIP-FLOP WITH MASTER RESET, MONOLITHIC SILICON

6、DRAWING APPROVAL DATE 88-12-06 REVISION LEVEL F SIZE A CAGE CODE 67268 5962-87756 SHEET 1 OF 23 DSCC FORM 2233 APR 97 5962-E373-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87756 DLA LAND AND MARITIME C

7、OLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are availa

8、ble and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 87756 01 R A Federal stock class designator RHA des

9、ignator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 F 87756 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (se

10、e 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are ma

11、rked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC273 Octal D-type flip-flop with master reset 1.2.3 Device class designator. The devic

12、e class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device

13、 class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or

14、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87756 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline lette

15、r Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack X See figure 1 20 Flat pack Z GDFP1-G20 20 Flat pack with gull-wing 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PR

16、F-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/, 2/, 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input

17、 clamp current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) . 50 mA DC VCCor GND current (per output pin) (ICC, IGND) 50 mA Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): Case outline X . +260C All other case

18、outlines except case X +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 4/ 1.4 Recommended operating conditions. 2/, 3/, 5/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT). +0.0

19、V dc to VCCCase operating temperature range (TC) . -55C to +125C Maximum input rise or fall time rate (t/V): VCC= 3.6 V to 5.5 V 0 to 8 ns/V Minimum setup time, Dn to CP (ts): TC= +25C, VCC= 3.0 V 6.5 ns TC= +25C, VCC= 4.5 V . 4.0 ns TC= -55C to +125C, VCC= 3.0 V . 8.0 ns TC= -55C to +125C, VCC= 4.5

20、 V . 5.0 ns Minimum hold time, Dn to CP (th): TC= +25C, VCC= 3.0 V 1.0 ns TC= +25C, VCC= 4.5 V 1.0 ns TC= -55C to +125C, VCC= 3.0 V . 1.0 ns TC= -55C to +125C, VCC= 4.5 V . 1.0 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

21、DRAWING SIZE A 5962-87756 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continued. 2/, 3/, 5/ Minimum pulse width, CP (tw): TC= +25C, VCC= 3.0 V . 5.5 ns TC= +25C, VCC= 4.5 V . 5.0 ns TC= -55C to +125C, VCC= 3.0

22、V . 6.5 ns TC= -55C to +125C, VCC= 4.5 V . 5.0 ns Maximum frequency (fmax): TC= +25C, VCC= 3.0 V . 90 MHz TC= +25C, VCC= 4.5 V . 95 MHz TC= -55C to +125C, VCC= 3.0 V . 75 MHz TC= -55C to +125C, VCC= 4.5 V . 90 MHz Minimum pulse width, MR (tw): TC= +25C, VCC= 3.0 V . 8.0 ns TC= +25C, VCC= 4.5 V . 5.0

23、 ns TC= -55C to +125C, VCC= 3.0 V 10.0 ns TC= -55C to +125C, VCC= 4.5 V . 6.5 ns Minimum recovery time, MR to CP (trec): TC= +25C, VCC= 3.0 V . 5.0 ns TC= +25C, VCC= 4.5 V . 3.5 ns TC= -55C to +125C, VCC= 3.0 V . 6.0 ns TC= -55C to +125C, VCC= 4.5 V . 4.0 ns 1.5 Radiation features. Device type 01: M

24、aximum total dose available (dose rate = 50 300 rads (Si)/s) 300 krads (Si) 6/ Single Event Latch-up (SEL) at LET (see 4.4.4.2) . 93 MeV-cm2/mg 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance

25、and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ Maximum junction temperature shall not be exceeded except for allowabl

26、e short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Data retention implies no input transition and no stored data loss with the following con

27、ditions: VIH 70% of VCC, VIL 30% of VCC, VOH 70% of VCC -20A, VOL 30% of VCC 20 A. 6/ These limits were obtained during technology characterization and qualification, and are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or con

28、tract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87756 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification

29、, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 -

30、 Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawing

31、s. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following docum

32、ent(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Adv

33、anced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event P

34、henomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, P. O. Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959). (Non-Government standards and other publications are nor

35、mally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the t

36、ext of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38

37、535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendi

38、x A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

39、2-87756 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, a

40、ppendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with figure 1 and 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 L

41、ogic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under do

42、cument revision level control and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter

43、limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part

44、shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using

45、this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and

46、V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in ord

47、er to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and

48、 Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.

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