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本文(DLA SMD-5962-87771 REV E-2010 MICROCIRCUIT LINEAR QUAD LOW OFFSET LOW POWER OPERATIONAL AMPLIFIER MONOLITHIC SILICON.pdf)为本站会员(testyield361)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-87771 REV E-2010 MICROCIRCUIT LINEAR QUAD LOW OFFSET LOW POWER OPERATIONAL AMPLIFIER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change to one part-one number format. Add table III. Editorial changes throughout. 91-12-11 M. A. FRYE B Changes in accordance with NOR 5962-R049-95. 94-12-21 M. A. FRYE C Changes in accordance with NOR 5962-R035-97. 96-11-26 R. MONNIN D Removed

2、table III, burn-in, dynamic burn-in, static and dynamic test circuits. Drawing updated to reflect current requirements. -rrp 02-12-17 R. MONNIN E Update boilerplate paragraphs to current MIL-PRF-38535 requirements. -rrp 10-03-02 C. SAFFLE THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. R

3、EV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR

4、 USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, QUAD LOW OFFSET, LOW POWER, OPERATIONAL AMPLIFIER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-12-11 AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-87771 SHEET 1 OF 11 DSCC FORM

5、 2233 APR 97 5962-E506-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This

6、 drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radia

7、tion Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 87771 01 M C X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see

8、 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the a

9、ppropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 OP400A Quad low offset low power operational amplifier 1.2.3 Device class designator. The device class d

10、esignator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certifica

11、tion and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier K GDFP2-F24 or CDFP3

12、-F24 24 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

13、2-87771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) . 20 V Differential input voltage 30 V Input voltage Supply voltage Output short-circuit duration Continuous Power dissipation (PD) .

14、800 mW Storage temperature range -65C to +150C Lead temperature range (soldering, 60 seconds) +300C Junction temperature (TJ) -65C to +150C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Cases C and K . 91C/W Case 3 110C/W 1.4 Recommended o

15、perating conditions. Ambient operating temperature range (TA) -55C to +125C Supply voltage (VCC) . 15 V 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Un

16、less otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits

17、. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or

18、from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, howe

19、ver, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for Resal

20、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for de

21、vice classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device

22、 class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V

23、or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Schematic diagram. The schematic diagram shall be as specified on

24、 figure 2. 3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature ran

25、ge. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be

26、 marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall b

27、e in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M sh

28、all be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certif

29、icate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers

30、 product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device

31、 class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required fo

32、r any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onsho

33、re at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 49 (see MIL-PRF-38535, appendix A). 3.11 Supersession and substitution. PIN substitution information shall be as specified in

34、appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance charac

35、teristics. Test Symbol Conditions -55C TA +125C VCC= 15 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Input offset voltage VIO1 01 -150 +150 V 2, 3 -270 +270 Input offset current IIOVCM= 0 V 1 01 -1.0 +1.0 nA 2, 3 -2.5 +2.5 Input bias current IIBVCM = 0 V 1 01 -3.0 +

36、3.0 nA 2, 3 -5.0 +5.0 Input voltage range +IVR1/ 1, 2, 3 01 +12 V -IVR-12 Common mode rejection ratio CMRR VCM= 12 V 1 01 120 dB 2, 3 115 Power supply rejection ratio PSRR VCC= 3 V and 18 V 1 01 1.8 V/V 2, 3 3.2 Supply current ISYNo load 2/ 1 01 2.9 mA 2, 3 3.1 Large signal voltage gain AVSVOUT= 10

37、V, RL= 2 k 4 01 2000 V/mV 5, 6 1000 VOUT= 10 V, RL= 10 k 4 5000 5, 6 3000 Output voltage swing +VOPRL= 2 k 4, 5, 6 01 +11 V RL= 10 k +12 -VOPRL= 2 k -11 RL= 10 k -12 Input noise voltage density eNfO= 10 Hz, TA= +25C 3/ 7 01 22 nV/ Hz fO= 1000 Hz, TA= +25C 3/ 22 Input noise voltage eNT1 Hz to 100 Hz,

38、 TA= +25C 7 01 438 nVRMSSlew rate SR AV = +1, TA= +25C 7 01 0.05 V/s Average input offset voltage drift TCVIO8 01 1.2 V/C 1/ IVR guaranteed by CMRR test. 2/ ISYlimit = total all four amplifiers. 3/ eNat fO= 10 Hz and fO= 1000 Hz is guaranteed by eNT test. Provided by IHSNot for ResaleNo reproduction

39、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines C 3 K Terminal numbers Terminal symbols 1 OUT A NC OUT A 2 -IN A

40、OUT A -IN A 3 +IN A -IN A NC 4 VCC+NC NC 5 +IN B NC +IN A 6 -IN B +IN A VCC+7 OUT B NC +IN B 8 OUT C VCC+NC 9 -IN C NC NC 10 +IN C +IN B NC 11 VCC-NC -IN B 12 +IN D NC OUT B 13 -IN D -IN B OUT C 14 OUT D OUT B -IN C 15 - NC NC 16 - OUT C NC 17 - -IN C NC 18 - NC +IN C 19 - NC VCC-20 - +IN C +IN D 21

41、 - NC NC 22 - VCC-NC 23 - NC -IN D 24 - +IN D OUT D 25 - NC - 26 - NC - 27 - -IN D - 28 - OUT D - NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87771 DEFEN

42、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 FIGURE 2. Schematic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87771 DEFENSE SUPPLY CENTER COLU

43、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan.

44、 The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-385

45、35, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for d

46、evice class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify

47、 the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q

48、 and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and s

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