DLA SMD-5962-87773 REV B-2007 MICROCIRCUIT DIGITAL ECL ONE SHOT MULTIVIBRATOR MONOLITHIC SILICON《硅单片单杆多频振荡器发光数字微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R114-93. 93-03-26 Monica L. Poelking B Redrawn with changes. Update drawing to current requirements. Editorial changes throughout. - gap 07-06-20 Robert M. Heber The original first sheet of this drawing has bee

2、n replaced. REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING I

3、S AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ECL, ONE SHOT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-07-12 MULTIVIBRATOR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87773 SHEET 1 OF 12 DSCC FORM 2233

4、APR 97 5962-E251-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawi

5、ng describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87773 01 E X Drawing number Device type (see 1.2.1) Case out

6、line(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 10598 Monostable multivibrator 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline

7、letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat pack 2 CQCC1-N20 20 leadless square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply volta

8、ge range (VCC= 0.0 V) . -8.0 V dc to 0.0 V dc Input voltage range (VCC= 0.0 V) 0.0 V dc to -5.2 V dc Storage temperature range . -65C to +165C Lead temperature (soldering, 10 seconds) . +300C Junction temperature (TJ) +165C Maximum power dissipation (PD) 440 mW Thermal resistance, junction-to-case (

9、JC) See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage (VEE) . -4.94 V dc minimum to -5.46 V dc maximum Ambient operating temperature range (TA) . -55C to +125C Minimum high level input voltage (VIH): TA= +25C . -0.780 V dc TA= +125C . -0.630 V dc TA= -55C -0.880 V dc Maximum low

10、level input voltage (VIL): TA= +25C . -1.850 V dc TA= +125C -1.820 V dc TA= -55C -1.920 V dc Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI

11、SION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are t

12、hose cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case

13、 Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document

14、 Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws a

15、nd regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Q

16、ualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with M

17、IL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification m

18、ark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines sh

19、all be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Precondition sequence. The precondition sequence is specified on figure 3A 3.2.5 Conditions for

20、testing output levels. The conditions for testing output levels is specified on figure 3B. 3.2.6 Switching waveforms and test circuit . The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the elect

21、rical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in ta

22、ble I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance

23、 with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “59

24、62-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to ident

25、ify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an app

26、roved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits d

27、elivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable require

28、d documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 50

29、04 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision le

30、vel control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and

31、 final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC

32、IRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Min Max Unit Cases E, F,

33、and 2 Quiescent tests 1/ 2/ VIHVILHigh level output voltage VOHOutputs terminated -0.780 -1.850 1 -0.930 -0.780 V through 100 to -2 V -0.630 -1.820 2 -0.825 -0.630 VCC= 0.0 V -0.880 -1.920 3 -1.080 -0.880 Low level output VOLVEE= -5.2 V -0.780 -1.850 1 -1.850 -1.620 V voltage 3/ -0.630 -1.820 2 -1.8

34、20 -1.545 -0.880 -1.920 3 -1.920 -1.665 High level threshold VOHA-1.105 -1.475 1 -0.950 -0.780 V output voltage -1.000 -1.400 2 -0.845 -0.630 -1.255 -1.510 3 -1.100 -0.880 Low level threshold VOLA-1.105 -1.475 1 -1.850 -1.600 V output voltage -1.000 -1.400 2 -1.820 -1.525 -1.255 -1.510 3 -1.920 -1.6

35、35 Power supply drain 4/ IEEVEE= -5.2 V 1 -100 mA current VCC= 0.0 V 2, 3 -111 High level input current IIH1VEE= -5.2 V Trigger input 1 220 A CC= 0.0 V 2, 3 375 IIH2VIH= -0.780 V at +25C POSE 1 260 A -0.630 V at +125C 2, 3 450 IH3-0.880 V at -55C High-speed 1 350 A input 2, 3 595 Low level input cur

36、rent IILVEE= -5.2 V, VCC= 0.0 V 1, 3 0.5 A VIL= -1.850 V at +25C 2 0.3 VIL= -1.820 V at +125C VIL= -1.920 V at -55C Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

37、DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Min Max Unit Cases E

38、, F, and 2 AC tests Transition time tr, VEE= -3.2 V 9 1.5 3.5 ns tfVCC= +2.0 V CL 5 pF 10, 11 1.0 4.5 RL= 100 Propagation delay time, tPHH1, See figure 4 9 2.5 5.5 ns trigger delay to output tPLL, tPHL1, 10, 11 2.0 7.0 tPLHPropagation delay time, tPHL2, 9 1.5 2.8 ns high-speed to output tPHH210, 11

39、1.0 4.0 1/ The quiescent limits are determined after a device has reached thermal equilibrium. This is defined as the reading taken with the device in a socket with 500 LFPM of +25C, +125C or -55C (as applicable) air blowing on the unit in a transverse direction with power applied for at least 4 min

40、utes before the reading is taken. This method was used for theoretical limit establishment only. 2/ The T test method creates the limits and test conditions to be used after an increased ambient temperature has been stabilized by external thermal sources. This adjusted temperature simulates the quie

41、scent method by increasing the specified case temperature (+25C, +125C, -55C) with a T. The T is theoretically determined based on the power dissipation and thermal characteristics of the device and package used. 3/ The high and low level output current varies with temperature, and can be calculated

42、 using the following formula: IOH= (-2.0 V - VOH)/100 , IOL= (-2.0 V - VOL)/100 . 4/ The IEElimits, although specified in the minimum column, shall not be exceeded, in magnitude, as a maximum value. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

43、NDARD MICROCIRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Case outlines E F 2 Terminal number Terminal symbol 1 VCC1TRIG IN NC 2 Q NC VCC13 Q HI-SPD Q 4 CEXTVCC2Q 5 POSE VCC1CEXT6 REXTQ NC 7 EXT PUL Q POSE 8 V

44、EECEXTREXT9 NC POSE EXT PUL 10 NEGE REXTVEE11 NC EXT PUL NC 12 NC VEENC 13 TRIG IN NC NEGE 14 NC NEGE NC 15 HI-SPD NC NC 16 VCC2NC NC 17 TRIG IN 18 NC 19 HI-SPD 20 VCC2NC = No connection Figure 1. Terminal connections. Input POSE NEGE Output L L Triggers on both positive and negative input slopes L

45、H Triggers on the positive input slope H L Triggers on the negative input slope H H Trigger is disabled FIGURE 2. Truth tables. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLU

46、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. At t = 0 a. Apply VIHmax to pins 5 and 10. b. Apply VILmin to pin 15. c. Ground pin 4. 2. At t 10 ns a. Open pin 1. b. Apply -3.0 V dc to pin 4. Hold test conditions for 10 ns. 3. Return pin 4 to ground and perfo

47、rm test as indicated on figure 3B. FIGURE 3A. Precondition sequence. Pins 1 and 16 = VCC= Ground. Pins 6 and 8 = VEE= -5.2 V dc. Outputs loaded 50 to -2.0 V dc. See figure 3A for precondition sequence. All pin references on figure 3 are for E package. FIGURE 3B. Conditions for testing output levels.

48、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87773 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 Pin condition Test Symbol P. U. T POSE NEGE Trigger in High-speed in Precondition (see figure 3A) 1 2 VOHVOHQ Q P1 VILmin Precondition (see figure 3A) 3 4 VOLVOLQ Q VILmin P1 Precondition (see figure 3