DLA SMD-5962-87788 REV E-2013 MICROCIRCUIT MEMORY DIGITAL 256 X 4-BIT BIPOLAR PROM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add one vendor, CAGE 18324. Inactivate Military drawing part numbers 5962-8778801FX, 5962-8778801EX, for new design. Add paragraph 4.5 and make editorial changes throughout. 88-09-16 M. A. Frye B Changed generic number and vendor similar part num

2、ber. Changes to table I. Remove programming procedures for method A. Deleted programming waveforms and table III. Editorial changes throughout. 90-01-17 M. A. Frye C Updated drawing to current requirements. Editorial changes throughout. gap 01-04-03 Raymond Monnin D Boilerplate update, part of 5 yea

3、r review. ksr 07-01-30 Joseph Rodenbeck E Updated boilerplate in accordance with the latest MIL-PRF-38535 requirements. glg 13-05-28 Charles Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10

4、 11 PMIC N/A PREPARED BY Monica L. Grosel DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, 256 X 4-BIT,

5、 AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-03-01 BIPOLAR PROM, MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-87788 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E440-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license

6、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance wit

7、h MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87788 01 E X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function a

8、s follows: Device type Generic number Circuit function Access time 01 27S21, 82S129 256 x 4-bit bipolar PROM (three-state) 60 ns 02 27S21A, 82S129A 256 x 4-bit bipolar PROM (three-state) 40 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter

9、 Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage

10、range . -0.5 V dc to +7.0 V dc Input voltage range -0.5 V dc to +5.5 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) per device 1/ . 715 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) 2/ See MIL-STD-1835 Junction temperature

11、(TJ) +175C DC voltage applied to outputs range (except during programming) . -0.5 V dc to +5.5 V dc maximum DC voltage applied to outputs during programming . 21 V dc Output current into outputs during programming (maximum duration of 1 second) . 250 mA DC input current range . -30 mA to +5.0 mA 1.4

12、 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) 0.8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Must withstand the added PDdue to short circuit

13、 test, e.g., IOS. 2/ Heat sinking is recommended to reduce the junction temperature. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEE

14、T 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

15、 solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPART

16、MENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia

17、, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtain

18、ed. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualifie

19、d manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality M

20、anagement (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identi

21、fy when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal con

22、nections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 2. 3.2.2.2 Programmed devices. The requirements for suppl

23、ying programmed devices are not part of this drawing. 3.2.3 Logic diagram(s). The logic diagram(s) shall be as specified on figure 3. 3.2.4 Switching test circuit. The switching test circuit shall be as specified on figure 4. 3.2.5 Switching waveforms. The switching waveforms shall be as specified o

24、n figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted witho

25、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests

26、 for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not f

27、easible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be r

28、eplaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Processing options. Since the PROM is an unprogrammed memory capable of being programmed by either the manufacturer or the user to result in a wide variety of PROM config

29、urations, two processing options are provided for selection in the contract, using an altered item drawing. 3.6.1 Unprogrammed PROM delivered to the user. All testing shall be verified through group A testing as defined in 4.3.1. It is recommended that users perform subgroups 7 and 9 after programmi

30、ng to verify the specific program configuration. 3.6.2 Manufacturer-programmed PROM delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing shall be satisfied by the manufacturer prior to delivery. 3.7 Certificat

31、e of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm

32、 that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.9 Notif

33、ication of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.10 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and a

34、pplicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordan

35、ce with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under doc

36、ument revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimu

37、m. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

38、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless othe

39、rwise specified Min Max Output high voltage VOHVCC= 4.5 V, IOH= -2.0 mA 1, 2, 3 All 2.4 V VIH= 2.0 V, VIL= 0.8 V Output low voltage VOLVCC= 4.5 V, IOL= 16 mA 1, 2, 3 .5 V VIH= 2.0 V, VIL= 0.8 V Input high level IIHVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 40 A current Input low level IILVCC= 5.5 V, VIN= 0.45 V

40、 1, 2, 3 -250 A current Power supply current ICCVCC= 5.5 V, VIN= 0.0 V 1, 2, 3 130 mA Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V High output leakage IOZHVCC= 5.5 V VO= 4.5 V 1, 2, 3 40 A current VIH= 2.0 V IOZLVIL= 0.8 V VO= 0.4 V -40 VCS= 2.4 V Output short circuit IOSVCC= 5.5 V

41、1, 2, 3 -15 90 mA current VOUT= 0.0 V 1/ Functional tests See 4.3.1d 7, 8 Address access time tAVQVCL= 50 pF 9, 10, 11 01 60 ns S1 is closed See figures 4 and 5 02 40 Enable access time tGVQVSee figures 4 and 5 2/ 9, 10, 11 01 30 ns 02 25 Enable recovery time tGVQZSee figures 4 and 5 2/ 9, 10, 11 01

42、 30 ns 02 25 1/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not exceed one second. 2/ tGVQVis tested with CL= 50 pF to the 1.5 V level; S1 is open for high impedance to high tests and closed for high impedance to low tests. tGVQZis test

43、ed with CL= 5 pF. High to high impedance tests are made with S1 open to an output voltage of VOH- 0.5 V. Low to high impedance tests are made with S1 closed to the VOL+ 0.5 V level. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI

44、T DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 Device Types All Case Outlines E and F 2 Terminal number Terminal symbol 1 A6NC 2 A5A63 A4A54 A3A45 A0A36 A1A07 A2A18 GND A29 O3NC 10 O2GND 11 O1NC 12 O0O313 CS 1 O214 CS 2 O115

45、 A7NC 16 VCCO017 - CS 1 18 - CS 2 19 - A720 - VCCFIGURE 1. Terminal connections. Word Enable Address Data No. CS 1 CS 2 A7 A6 A5 A4 A3 A2 A1 A0 O3 O2 O1 O0 NA L L X X X X X X X X L L L L H H X X X X X X X X OC OC OC OC H L X X X X X X X X OC OC OC OC L H X X X X X X X X OC OC OC OC NOTES: 1. NA = No

46、t applicable. 2. X = Input may be high level, low level, or open circuit. 3. OC = Open circuit (high resistance output). 4. Program readout can only be accomplished with enable input at low level. FIGURE 2. Truth table (unprogrammed). Provided by IHSNot for ResaleNo reproduction or networking permit

47、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

48、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-87788 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 Output load for all tests except tGVQZNOTES: 1. All device test loads should be located within 2 inches of the device output pin. 2. S1 is open for output data high to hi-Z and hi-Z to output data high test. S1 is closed for all other AC test. 3. Load capacitance includes all stray and fixture capacitance. FIGURE 4. Switching test circuit or equivalent. Provide