DLA SMD-5962-87803 REV D-2011 MICROCIRCUITS LINEAR PHASE FREQUENCY DETECTOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outline D. Add footnote to 6.4 case outline A. Correct forward leakage current test condition for IIHHpin 11. Editorial changes throughout. Add condition to ICCtest. 89-05-09 M. A. Frye B Changes in accordance with NOR 5962-R119-94 94-02

2、-24 M. A. Frye C Drawing updated to reflect current requirements. Redrawn. gt 04-06-09 R. Monnin D Update drawing as part of 5 year review. - jt 11-02-14 C. SAFFLE THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1

3、 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY DONALD R. OSBORNE DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DICENZO APPROVED BY RO

4、BERT P. EVANS MICROCIRCUIT, LINEAR, PHASE FREQUENCY DETECTOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-09-25 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-87803 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E148-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without li

5、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordanc

6、e with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87803 01 C X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit funct

7、ion as follows: Device type Generic number Circuit function 01 MC4344 Phase frequency detector 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style A 1/ GDFP5-F14 or CDFP6-F14 14 Flat pack C GDIP1-T

8、14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 2/ Supply voltage (VCC) -+7.0 V dc DC input voltage - +5.5 V dc DC output voltage - +5.5 V dc Storage temperature range

9、 - -65C to +150C Maximum power dissipation (PD) - 85 mW Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC) - See MIL-STD-1835, appendix C Thermal resistance, junction-to-case (JA): Cases A and D - 215C/W Case C - 130C/W Junction temperature (TJ) - +175C 1.4 Re

10、commended operating conditions. Supply voltage (VCC) - +4.5 V dc to +5.5 V dc Ambient operating temperature range (TA) - -55C to +125C 1/ Inactive for new design. Acceptable only for use in equipment designed or redesigned on or before 29 November 1986. 2/ Unless otherwise specified all voltages are

11、 referenced to ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Governme

12、nt specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION

13、 MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Micr

14、ocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the

15、 event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The in

16、dividual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been gra

17、nted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the

18、 requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design,

19、construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as sp

20、ecified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specif

21、ied in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accorda

22、nce with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the

23、“5962-“ on the device. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5.1 Certification/compliance mark.

24、 A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of

25、 compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm th

26、at the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notifica

27、tion of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and appl

28、icable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance

29、with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under

30、 document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, mi

31、nimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

32、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Limits Unit Min Max

33、Forward input current Pin 1 IILVIL= 0.4 V to pin 1 VCC= 5.5 V to pin 14 1, 2, 3 -4.8 mA Pin 3 VIL= 0.4 V to pin 3 VCC= 5.5 V to pin 14 -4.8 Pin 11 VIL= 0.4 V to pin 11 VCC= 5.5 V to pin 14 -1.6 Forward leakage current Pin 1 IIHVIH= 2.4 V to pin 1 VCC= 5.5 V to pin 14 1, 2, 3 120 A Pin 3 VIH= 2.4 V t

34、o pin 3 VCC= 5.5 V to pin 14 120 Pin 4 VCC= 5.5 V to pins 4, 14 GND = 0 V to pins 5, 7 VIH= 5.5 V to pin 4 5.0 Pin 11 VIH= 2.4 V to pin 11 VCC= 5.5 V to pin 14 40 Pin 1 IIHHVIHH= 5.5 V to pin 1 VCC= 5.5 V to pin 14 TA= +25C 1 1.0 mA Pin 3 VIHH= 5.5 V to pin 3 VCC= 5.5 V to pin 14 TA= +25C 1.0 Pin 11

35、 VIHH= 5.5 V to pin 11 VCC= 5.5 V to pin 14 TA= +25C 1.0 Input clamp voltage Pin 1 VICIIC= -10 mA to pin 1 VCC= 4.5 V to pin 14 TA= +25C 1 -1.5 V Pin 3 IIC= -10 mA to pin 3 VCC= 4.5 V to pin 14 TA= +25C -1.5 Diode voltage VFPin 5 = 1.0 mA GND = 0 V to pin 4 2.4 V Provided by IHSNot for ResaleNo repr

36、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA +12

37、5C (unless otherwise specified) Group A subgroups Limits Unit Min Max Output current Pin 8 IOPin 9 = 0.002 mA VCC= 5.5 V Pin 8 = 5.5 V TA= +25C 1 0.8 mA TA= +125C 2 1.0 TA= -55C 3 0.2 Output leakage current Pin 8 IOLKPin 8 = 5.5 V 1, 2, 3 120 A Pin 10 Pin 11 = 2.4 V, pin 10 = 1.5 V pin 14 = 5.5 V 5.

38、0 Output voltage 1/ Pin 6 VOHVCC= 4.5 V IOH= -1.6 mA pins 1, 3 = VILT1, 2, 3 2.4 V IOH= -1.6 mA pins 1 = VIHTpins 3 = VILT2.4 Pin 12 IOH= -1.6 mA pins 1, 3 = VILT2.4 IOH= -1.6 mA pins 1, 3 = VIHT2.4 Pin 6 VOLIOL= 20 mA pins 1, 3 = VIHT0.4 Pin 12 IOL= 20 mA pins 1 = VIHTpins 3 = VILT0.4 Output voltag

39、e 1/ Pin 2 2/ VOHIOH= -1.6 mA pins 1, 3 = VILT1, 2, 3 2.4 V Pin 2 3/ VOLIOL= 20 mA pins 1, 3 = VILT0.4 Pin 13 2/ VOLIOL= 20 mA pins 1, 3 = VILT0.4 Pin 13 4/ VOHIOH= -1.6 mA pins 1, 3 = VILT2.4 Power supply current ICCVCC= 5.5 V 1, 2, 3 40 mA Functional tests See 4.3.1c 7 1/ Output voltage tests util

40、ize the following forcing functions: VILT= 1.1 V dc at TA= -55C and +25C, VILT= 0.8 V dc at TA= +125C, VIHT= 2.0 V dc at TA= -55C, and VIHT= 1.8 V dc at TA= +25C and +125C. 2/ Preconditioning by going through truth table steps 1 through 7 (see figure 2) is required before this test. 3/ Preconditioni

41、ng by going through truth table steps 1 through 13 (see figure 2) is required before this test. 4/ Preconditioning by going through truth table steps 1 through 11 (see figure 2) is required before this test. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

42、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device types 01 Case outline A, C, and D Terminal number Terminal symbol 1 R 2 D13 V 4 PU 5 UF 6 D27 GND 8 OUTPUT 9 AMP IN 10 DF 11 PD 12 U213 U114 VCC

43、FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Input state Input Output Tr

44、uth table This is not strictly a functional truth table; i.e., it does not show all possible modes of operation. It is useful for dc testing. R V U1 D1 U2 D2 1 2 3 4 0 1 1 1 0 0 1 0 X X X X X X X X 1 0 1 0 1 1 0 1 5 6 7 8 0 1 0 1 0 0 0 0 X X 0 0 X X 1 1 1 0 1 0 1 1 1 1 9 10 11 12 0 0 0 0 0 1 0 1 0 0

45、 1 1 1 1 1 1 1 1 1 1 1 1 1 1 NOTES: 1. X indicates output state unknown. 2. U1 and D1 outputs are sequential; i.e., they must be sequenced in order shown. 3. U2 and D2 outputs are combinational; i.e., they need only inputs shown to obtain outputs. 13 14 15 16 17 0 0 0 1 0 0 1 0 0 0 1 1 1 1 1 0 0 0 0

46、 1 1 1 1 0 1 1 1 1 1 1 FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Log

47、ic diagram Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87803 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram - Continued Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT