DLA SMD-5962-87805 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS DUAL MULTIVIBRATOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add waveforms, test circuit, and notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-06-28 Thomas M. Hess B Update test condition of IOHand IOLvalues for High and Low output voltage to

2、 table I. Update boilerplate paragraphs to current MIL-PRF-38535 requirements. - MAA 11-07-26 Thomas M. Hess REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www

3、.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, DUAL MULTIVIBRATOR, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

4、87-04-14 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87805 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E438-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO

5、 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in

6、 the following example: 5962-87805 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC221 Dual non-retriggerable monostable m

7、ultivibrator with reset 02 54HC221A Dual non-retriggerable monostable multivibrator with reset 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N

8、20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5

9、 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) . 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 2/ Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case

10、 (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC

11、UIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf):

12、 VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns Minimum pulse width, A, B, and CLEAR (tW): TC= +25C: VCC= 2.0 V 123 ns VCC= 4.5 V 30 ns VCC= 6.0 V 21 ns TC= -55C and +125C: VCC= 2.0 V 157 ns VCC= 4.5 V 42 ns VCC= 6.0 V 30 ns Minimum CLEAR removal time (tREM): TC= -55C an

13、d +125C: VCC= 2.0 V 75 ns VCC= 4.5 V 15 ns VCC= 6.0 V 13 ns Minimum output pulse width (tWQ(MIN): Device type 01, TC= +25C, CEXT= 0.1 F, REXT= 10 k: VCC= 5.0 V 630 s to 770 s Device type 02, TC= +25C, CEXT= 28 pF: VCC= 2.0 V dc, REXT= 6 k 1.5 s VCC= 4.5 V dc, REXT= 2 k 450 ns VCC= 6.0 V dc, REXT= 2

14、k 380 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or

15、contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE H

16、ANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA

17、 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

18、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item

19、requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitio

20、nal certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements

21、herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction,

22、and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on fig

23、ure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance ch

24、aracteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. Th

25、e electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD P

26、IN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indica

27、tor “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MI

28、L-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformanc

29、e. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verifica

30、tion and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for

31、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC

32、+125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 2.0 V All 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHor VILIOH= -4.0 mA VCC= 4.5 V 3.7 VIN= VIHor VILIOH= -5.2 mA VCC= 6.0 V 5.2 Low level output vol

33、tage VOLVIN= VIHor VILIOL= +20 A VCC= 2.0 V All 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL= +4.0 mA VCC= 4.5 V 0.4 VIN= VIHor VILIOL= +5.2 mA VCC= 6.0 V 0.4 High level input voltage 2/ VIHVCC= 2.0 V All 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage 2/ VILVCC

34、= 2.0 V All 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Quiescent supply current ICCVCC= 6.0 V, VIN= VCCor GND All 1, 2, 3 160 A Input leakage current IINVCC= 6.0 V, VIN= VCCor GND All 1, 2, 3 1.0 A Input capacitance CINVIN= 0.0 V TC= +25C See 4.3.1c REXT/CEXTinput All 4 20 pF All others 10 Function

35、al tests See 4.3.1d All 7 Propagation delay time, An, Bn, or CLEAR to Qn 3/ tPLH1 CL = 50 pF 10% See figure 4 VCC= 2.0 V All 9 240 ns 10, 11 360 VCC= 4.5 V 9 48 10, 11 72 VCC= 6.0 V 9 41 10, 11 61 Propagation delay time, An, Bn, or CLEAR to Qnnullnullnullnull3/ tPHL1 CL = 50 pF 10% See figure 4 VCC=

36、 2.0 V All 9 200 ns 10, 11 300 VCC= 4.5 V 9 48 10, 11 67 VCC= 6.0 V 9 38 10, 11 51 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 432

37、18-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC+125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max Propagation delay time, CLEAR to Qn 3/ tPHL2 CL = 50 pF 10% See figure

38、 4 VCC= 2.0 V All 9 180 ns 10, 11 270 VCC= 4.5 V 9 36 10, 11 54 VCC= 6.0 V 9 31 10, 11 46 Propagation delay time, CLEAR to Qnnullnullnullnull3/ tPLH2 CL = 50 pF 10% See figure 4 VCC= 2.0 V All 9 210 ns 10, 11 315 VCC= 4.5 V 9 42 10, 11 63 VCC= 6.0 V 9 36 10, 11 54 Output pulse width tWQCL= 50 pF 10%

39、 CEXT= 0.1 F REXT= 10 k See figure 4 VCC= 5.0 V 01 9 0.63 0.77 ms 10, 11 0.595 0.805 VCC= 4.5 V 02 9 0.9 1.1 10, 11 0.85 1.15 Transition time 4/ tTHL, tTLH CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 1/ For a power supply of 5.0 V

40、10%, the worst case output voltages (VOHand VOL) occur for HC at VCC= 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IINand ICC) occur

41、for CMOS at the higher voltage so the 6.0 V value should be used. Power dissipation capacitance (CPD), typically 166 pF, determines the no-load dynamic power consumption (PD) and the no-load dynamic current consumption (IS). Where PD= CPDVCC2f + ICCVCCIS= CPDVCCf + ICCf is the frequency of the input

42、 signal. 2/ Test not required if applied as a forcing function for VOHor VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits. 4/ Transition time (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for Re

43、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outlines E 2 Terminal number Terminal symbol Terminal symbol 1

44、2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A1 B1 CLEAR 1 Q1nullnullnullnullQ2 CEXT2REXT2/CEXT2GND A2 B2 CLEAR 2 Q2nullnullnullnullQ1 CEXT1REXT1/CEXT1VCC- - - - NC A1 B1 CLEAR 1 Q1nullnullnullnullNC Q2 CEXT2REXT2/CEXT2GND NC A2 B2 CLEAR 2 Q2nullnullnullnullNC Q1 CEXT1REXT1/CEXT1VCCNC = No inter

45、nal connection FIGURE 1. Terminal connections. Inputs Outputs CLEAR An Bn Qn QnnullnullnullnullL X X L H X H X L H X X L L H H L H H L H H = High voltage level L = Low voltage level X = Irrelevant = Transition from low to high = Transition from high to low = One high level pulse = One low level puls

46、e FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided

47、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot f

48、or ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87805 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes test jig and probe capacitance. 2. Input signal from pulse generator: VIN= 0.0 V to VCC. PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfsha