DLA SMD-5962-88594 REV C-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 256 X 4 STATIC RAM (SRAM) MONOLITHIC SILICON《硅单片256 X 4静态记忆体复位互补型金属氧化物半导体数字存储微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add F-6 package. Editorial changes throughout 91-04-23 M. A. Frye B Changes in accordance with NOR 5962-R002-92 91-10-10 M. A. Frye C Boilerplate update, part of 5 year review. ksr 06-11-14 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING

2、HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRA

3、WING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-07-27 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 256 X 4 STATIC RAM (SRAM), MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88594 SHEET 1 OF

4、12 DSCC FORM 2233 APR 97 5962-E008-07 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88594 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.

5、1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88594 01 X A Drawing number Device type (

6、see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Acess time 01 256 X 4 CMOS static RAM 15 ns 02 256 X 4 CMOS static RAM 35 ns 03 256 X 4 CMOS static RAM 25 ns 1.2

7、.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 flat package W GDIP1-T22 or CDIP2-T22 22 dual-in-line package X CQCC1-N24 24 square chip carrier package 1.2.3 Lead fini

8、sh. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage to ground potential - -0.5 V dc to +7.0 V dc DC voltage applied to outputs - -0.5 V dc to VCC+0.5 V dc DC input voltage - -0.5 V dc to VCC+0.5 V dc Output current into outputs (low)- 20 mA

9、Storage temperature range - -65C to +150C Maximum power dissipation (PD) 2/- 495 mW Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC): Cases W, X, and K - See MIL-STD-1835 Junction temperature (TJ)- +175C Latchup current- 200 mA 1.4 Recommended operating cond

10、itions. Supply voltage (VCC) - 4.5 V dc to 5.5 V dc Minimum high level input voltage (VIH) - 2.1 V dc Maximum low level input voltage (VIL) - 0.8 V dc Case operating temperature range (TC)- -55C to +125C 1/ Generic numbers are listed on the Standardized Microcircuit Drawing Source Approval Bulletin

11、at the end of this document and will also be listed in MIL-HDBK-103. 2/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88594 DEFENSE SUPPLY CE

12、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise sp

13、ecified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 -

14、Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.

15、dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this doc

16、ument, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product b

17、uilt to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and quali

18、fying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as desc

19、ribed herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herei

20、n. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwi

21、se specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each s

22、ubgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due

23、 to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced wit

24、h a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88594 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

25、, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions Group A Device Limits Unit -55C TC +125C subgroups type 4.5 V VCC 5.5 V Min Max unless otherwise specified Output high voltage VOHVCC= 4.5 V, IOH= -5.2 mA, 1,2,3 A

26、ll 2.4 V VIL= 0.8 V, VIH= 2.1 V Output low voltage VOLVCC= 4.5 V, IOL= 8.0 mA, 1,2,3 All 0.4 V VIL= 0.8 V, VIH= 2.1 V Input load current II0 V VIN 5.5 V 1,2,3 All -10 10 A Output current, high IOZVOL VOUT VOH, output 1,2,3 All -10 10 A impedance disabled Output short circuit IOSVCC= 5.5 V, VOUT= 0 V

27、 1,2,3 All -90 mA current 1/ 2/ Power supply current ICCAddresses cycling between VSS 1,2,3 All 90 mA and 3.0 V, f = 1/tAVAV(minimum) VCC= 5.5 V, CE1= 0.8 V, CE2= 2.1 V, outputs open, WE = 2.1 V, OE = 0.8 V Input capacitance CINVCC= 5.0 V, f = 1.0 MHz, 4 All 6.0 pF TA= +25C, see 4.3.1c Output capaci

28、tance COUT 4 All 7.0 pF Read cycle time tAVAVSee figures 3 and 4 3/ 9,10,11 01 15 ns 02 35 ns 03 25 ns Chip select time tELQVSee figures 3 and 4 3/ 9,10,11 01 8.0 ns 02 25 ns 03 15 ns Chip select to high tE1HQZSee figures 3 and 4 2/ 4/ 9,10,11 01 12 ns impedance 02 30 ns 03 20 ns See footnotes at en

29、d of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88594 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance charac

30、teristics - Continued. Test Symbol Conditions Group A Device Limits Unit -55C TC +125C subgroups type 4.5 V VCC 5.5 V Min Max unless otherwise specified Output enable time tOLQVSee figures 3 and 4 3/ 9,10,11 01 8.0 ns 02 25 ns 03 15 ns Output enable to high tOHQZSee figures 3 and 4 2/ 4/ 9,10,11 01

31、12 ns impedance 02 30 ns 03 20 ns Address access time tAVQVSee figures 3 and 4 3/ 9,10,11 01 15 ns 02 35 ns 03 25 ns Write cycle time tAVAVSee figures 3 and 5 3/ 9,10,11 01 15 ns 02 35 ns 03 25 ns Write enable to high tWLQZSee figures 3 and 5 2/ 4/ 9,10,11 01 12 ns impedance 02 30 ns 03 20 ns Write

32、recovery time tWHQVSee figures 3 and 5 3/ 9,10,11 01 12 ns 02 25 ns 03 20 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88594 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

33、43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Group A Device Limits Unit -55C TC +125C subgroups type 4.5 V VCC 5.5 V Min Max unless otherwise specified Write pulse width tWLWHSee figures 3 and 5 3/ 5/ 9,

34、10,11 01 11 ns 02 25 ns 03 15 ns Data setup time prior tDXWLSee figures 3 and 5 3/ 9,10,11 01 0 ns to write 02, 03 5.0 ns Data hold time after tWHDXSee figures 3 and 5 3/ 9,10,11 01 2.0 ns write 02, 03 5.0 ns Address setup time tAVWLSee figures 3 and 5 3/ 5/ 9,10,11 01 0 ns 02 10 ns 03 5.0 ns Addres

35、s hold time tWHAXSee figures 3 and 5 3/ 9,10,11 01 4.0 ns 02, 03 5.0 ns Chip select setup time tE1LWLSee figures 3 and 5 3/ 9,10,11 01 0 ns tE2HWL 02, 03 5.0 ns Chip select hold time tWHE2LSee figures 3 and 5 3/ 9,10,11 01 2.0 ns 02, 03 5.0 ns 1/ Not more than one output should be shorted at a time,

36、 and duration of short circuit shall not exceed 30 seconds. 2/ May not be tested, but shall be guaranteed to the limits specified in table I. 3/ Test conditions assume signal transition times of 3.0 ns or less for device type 01 and 5.0 ns or less for device types 02 and 03. Timing is referenced at

37、input and output levels of 1.5 V. Output loading is equivalent to the specified IOL/IOHwith a load capacitance of 30 pF. 4/ Test conditions assume signal transition times of 3.0 ns or less for device type 01 and 5.0 ns or less for device types 02 and 03. Transition is measured at steady-state high l

38、evel of -500 mV or steady-state low level of +500 mV on the output from 1.5 V level on the input with a load capacitance of 5.0 pF. 5/ tWLWHis measured at tAVWL= minimum. tAVWLis measured at tWLWH= minimum. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88594 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types All All 02, 03 Case outlines W X K Terminal nu