DLA SMD-5962-88602 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL 16-BIT SERIAL-IN SERIAL-OUT SHIFT REGISTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changed test circuit and waveforms. Editorial changes throughout. Added new package type “L“. 89-09-28 W. Heckman B Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 00-12-22 Raymond Monnin C Update d

2、rawing to current requirement. Editorial changes throughout. - gap 08-06-12 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUP

3、PLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, 16-BIT, SERIAL-IN, AND AGENCIES OF THE

4、 DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-05-18 SERIAL-OUT, SHIFT REGISTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88602 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E129-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

5、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance

6、with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88602 01 J X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function a

7、s follows: Device type Generic number Circuit function 01 54LS673 16-bit, serial-in, serial-out shift register with 16-bit parallel-out storage register and three state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive des

8、ignator Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line K GDFP2-F24 or CDFP3-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum

9、 ratings. 1/ Supply voltage . -0.5 V dc to +7.0 V dc Input voltage: SER/Q15 input . -1.5 V dc at -18mA to +5.5 V dc All other inputs . -1.5 V dc at -18mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 2/ . 440 mW 2/ Lead temperature (soldering, 10 seconds) +300

10、C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation

11、 is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., I0S. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REV

12、ISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) +2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C to +125C Minimum width of

13、 input clock pulse (tWCLK) . 20 ns Minimum width of input clock pulse (tWCLR) . 20 ns Minimum setup time (tS): SER/Q15 20 ns MODE/STRCLK . 35 ns R/W , CS 35 ns SH CLK to MODE/STRCLK 3/ 25 ns Minimum hold time, all inputs (th) 0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and

14、handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circu

15、its, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 -

16、 Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the t

17、ext of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 3/ This setup time ensures the storage register will see stable data from the

18、 shift register. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirem

19、ents. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who

20、has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifica

21、tions to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used.

22、3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections sh

23、all be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein

24、, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are describ

25、ed in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitatio

26、ns, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ ce

27、rtification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of

28、compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, app

29、endix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option t

30、o review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962

31、-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max High level output volta

32、ge VOHVCC= +4.5 V, VIL= 0.7 V, SER/Q15 IOH= 1.0 mA 1, 2, 3 2.4 V VIH= +2.0 V Y0 through Y15 IOH= -0.4 mA 1, 2, 3 2.4 V Low level output voltage VOLVCC= +4.5 V, VIL= 0.7 V, SER/Q15 IOL= 12 mA 1, 2, 3 0.4 V VIH= +2.0 V Y0 through Y15 IOL= 4.0 mA 1, 2, 3 0.4 V Input clamp voltage VICIIN= -18 mA, VCC= +

33、4.5 V 1, 2, 3 -1.5 V IIH1VIN= +5.5 V SER/Q15 1, 2, 3 0.1 mA High level input current IIH2VCC= +5.5 V VIN= +7.0 V All other inputs 1, 2, 3 0.1 mA SER/Q15 1, 2, 3 40 A IIH3VCC= +5.5 V, VIN= +2.7 V All other inputs 1, 2, 3 20 A Off-state output current IOZHVCC= +5.5 V, VIH= +2.0 V, VIL= +0.7 V, VOUT= +

34、2.7 V SER/Q15 1, 2, 3 40 A IOZLVCC= +5.5 V, VIH= +2.0 V, VIL= +0.7 V, VOUT= +0.4 V 1, 2, 3 -0.4 mA Low level input current IILVCC= +5.5 V, VIN= 0.4 V, 1, 2, 3 -0.4 mA Short-circuit output current IOSVCC= +5.5 V 1/ SER/Q15 1, 2, 3 -30 -130 mA Y0 through Y15 1, 2, 3 -20 -100 mA Supply current ICCVCC=

35、+5.5 V 1, 2, 3 80 mA Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEV

36、EL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max 9 20 Maximum clock frequency, SH CLK to SER/Q15 fMAXRL= 667 10, 11 12 MHz 9 5 43 ns Pro

37、pagation delay time, STRCLR to Y0 through Y15 tPHL1 10, 11 5 60 9 5 48 ns tPLH2 RL= 2 k 10, 11 5 67 9 5 48 ns Propagation delay time, MODE/STRCLK to Y0 through Y15 tPHL2 10, 11 5 67 9 5 33 tPLH3 RL= 667 10, 11 5 47 ns 9 5 40 Propagation delay time, SH CLK to SER/Q15 tPHL3 10, 11 5 57 ns 9 5 45 ns Ou

38、tput enable time, CS , R/ W to SER/Q15 tPZH RL= 667 10, 11 5 64 9 5 45 ns tPZL 10, 11 5 64 9 5 44 ns tPHZ RL= 667 10, 11 5 61 9 5 44 ns Output disable time, CS , R/ W to SER/Q15 tPLZ VCC= 5.0 V, CL= 50 pF 2/ See figure 3 10, 11 5 61 1/ Not more than one output shall be shorted at a time, and the dur

39、ation of the short-circuit condition shall not exceed one second. 2/ Propagation delay time testing may be performed using either CL= 5 pF, 15 pF, 45 pF or 50 pF. However, the manufacturer must certify and guarantee that the microcircuit meets the switching test limits specified for a 50 pF load. Pr

40、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Case outlines J, K, and L 3 Terminal number Terminal

41、 connection 1 CS NC 2 SH CLK CS 3 R/ W SH CLK 4 STRCLR R/ W 5 MODE/STRCLK STRCLR 6 SER/Q15 MODE/STRCLK 7 Y0 SER/Q15 8 Y1 NC 9 Y2 Y0 10 Y3 Y111 Y4 Y2 12 GND Y313 Y5 Y4 14 Y6 GND15 Y7 NC 16 Y8 Y517 Y9 Y6 18 Y10 Y719 Y11 Y8 20 Y12 Y921 Y13 Y10 22 Y14 NC 23 Y15 Y11 24 VCCY12 25 Y13 26 Y14 27 Y15 28 VCCN

42、C = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97

43、Inputs Shift register functions Storage register functions CS R/ W SH CLK STRCLRMODE/ STRCLK SER/ Q15 Shift Read from Serial output Write into Serial input Parallel Load Clear Load H X X X X Z No No No No No X X X L X Yes L L X X Z Yes No Yes No L H X X X Q15 Yes No No L H X L Q14n Yes Yes No No NoL

44、 H L H L No Yes Yes Yes No L H H H Y15n No Yes Yes No NoL L X H Z No No No Yes L = Low level (steady state) H = High level (steady state) = transition from low to high level = transition from high to low level X = irrelevant (any input including transitions) Z = Off-state (high impedance) of a 3-sta

45、te output Q14n = content of 14th bit of the shift register before the most recent transition of the clock. Q15 = present content of 15th bit of the shift register. Y15n= content of the 15th bit of the storage register before the most recent transition of the clock. FIGURE 2. Truth table. Provided by

46、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Switching waveforms and test circuit. Provided by I

47、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. The pulse generator shall have the following charact

48、eristics: PRR 1.0 MHz, tTLH 15 ns, tTHL 6 ns. 2. CLincludes probe and jig capacitance. 3. RL= 2 K or 667 . 4. All diodes are 1N3064, 1N916 or equivalent. FIGURE 3. Switching waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISI